P4080DS Disable Chip Select and Memory Controller Interleaving

[yyurtcan]

Hi,

I have p4080ds board. In u-boot, both chip select and memory controller (cache line) interleaving are enabled.

First, I want to disable chip select interleaving and enable memory controller, boot board.

Second I want to disable memory controller interleaving and enable chip select interleaving, boot board.

Finally I want to diasble both.

How can I do that? Which registers do I need to change?

Best regards.

[Bulat]

DDR interleaving can be configured in include\configs\coherent_ds.h file. Relevant lines by default:

     "hwconfig=fsl_ddr:ctlr_intlv=cacheline,"  

     "bank_intlv=cs0_cs1;"

To disable memory controller interleaving you need to set

     "hwconfig=fsl_ddr:ctlr_intlv=null,"  

To disable chip select  interleaving you need to set

     "bank_intlv=null;"

More details can be found in doc\README.fsl-ddr file.

Regards,

Bulat