P2041rdb USB initialization problem

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P2041rdb USB initialization problem

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osmanzekier
Contributor II

Greetings,

I am using a 2041rdb and I am trying to develop my USB host controller driver. During the port PHY connection part of the initialization, I lose connection with CPU for some reason.

I have looked at some linux codes for reference and i dont know what i am missing here.

What i am doing;

1. Reset host controller with USB1_USBCMD register. and poll on the reset bit.

2. Set CM field of USB1_USBMODE to 0x3.

3. Set up snoop windows.

4. Enable UTMI PHY and select UTMI as the clock source on USB1_CONTROL

5. Select UTMI interface on USB1_PORTSC.

I lose connection when I am trying step 5. I am aware of the endianess issue and i checked DCFG_DEVDISR1 register.

When i load uboot and try this sequence it works fine. But when i am trying to run my own software something happens to CPU. I am open to any suggestions at the moment.

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Pavel
NXP TechSupport
NXP TechSupport

Look at the Section 16.9.1 of the P2041 Reference Manual (https://www.freescale.com/webapp/Download?colCode=P2040RM&location=null&fasp=1&WT_TYPE=Reference%20M...).

This Section contains host initialization sequence.

Look at the Section 16.11.1 of the P2041 Reference Manual. This Section contains device initialization sequence.

Use this commands sequence for the P2041 USB initialization.

253 Views
osmanzekier
Contributor II

Hello Pavel Chubakov,

Thank you for your reply.

I also have tried the exact sequence in section 16.9.1. My issue is that i cannot seem to modify PORTSC register in any way. When i attempt to write anything in PORTSC register CPU hangs.

When i try the same sequence while uboot is running it works fine. Are there other prequisite settings. I suspect that it has something to do with the clock not apearing on the internal PHY or some other low-level configurations. I went thorugh RM but could not find a possible source for this issue.

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Pavel
NXP TechSupport
NXP TechSupport

Check please setting of the USB_CONTROL register. This register uses big-endian byte ordering and is not defined in the EHCI specification.

Bytes swap is needed for this register.

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osmanzekier
Contributor II

It is 0x00000200. And i am able to read this value from USB_CONTROL. I am byte swapping every register with the offset less than 0x400.

Reading from HCSPARAMS gives me the value 0x11000100 which tells me that little endien registers needs byte swapping rather than big endian registers. However you got me confused there.

However i tried byte swapping everything in case i was wrong and it did not work.

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