Thanks for all of your responses.
I'm using "P2020 QorIQ Integrated Processor Reference Manual, rev. 2, 12/2012"
Going To -Chapter 2 :CCSR address map
Page 84, I quote : "The default value for CCSRBAR is 0x0_FFE0_0000 (or 4 Gbytes-9 Mbytes)."
Page 94, I quote :
"2.2.4 CCSR address map
The full register address of any CCSR is comprised of the CCSR window base address,
specified in CCSRBAR (default address 0x0_FFE0_0000), plus the functional block base
address, plus the specific register's offset within that block."
But I have found in -Chapter : 4 Reset, Clocking, and Initialization
Page 122 :
"The set of configuration, control, and status registers occupies a 1-Mbyte region of
memory. Their location is programmable using the CCSR base address register
(CCSRBAR). The default base address for the configuration, control, and status registers
is 0xFF70_0000 (CCSRBAR = 0x000F_F700)."
That is all what was found in the document.
I didn't find the second address in first place because i was searching for 0x0_ff70_0000 in the document.
Thought confusing, I'll stick with 0xFF70_0000 as it doesn't make my debug session to crash.
Any further information will be appriciated.