Hi,
I like to understand memory map of P1010, After system startup the boot loaders maps physical address and effective address(EA) for NOR flash is 0xEE00_0000 ~ EFFF_FFFF.
but I see the Flash Bank usage command for NOR as
=> pro off all;era eff40000 efffffff;cp.b 1000000 eff40000 $filesize
Whether the start address should be 0xEE00_0000 or 0xEFF4_0000.? if it is 0xEFF4_0000 can anyone explain how mapping done. How does Processor jump to start address of uboot?
Nathan
Solved! Go to Solution.
You wrote:
> if it is 0xEFF4_0000 can anyone explain how mapping done.
The mentioned NOR Flash programming sequence corresponds to U-Boot.
The following row from the NOR Flash mapping table (Table 1. Memory Map Address) has a long-lasting typo:
0x001f_0000 | 0x01ff_ffff | Bootloader and env | 1 MB |
correct version is:
0x01f4_0000 | 0x01ff_ffff | Bootloader and env | 1 MB |
You wrote:
> How does Processor jump to start address of uboot?
Please note that after reset the IFC_CSPR0[V]=1 and IFC_AMASK0[AM]=0 (Memory Bank Size 4GB) – i.e. in case of the P1010RDB NOR boot the whole address space (4GB) will "contain" 32MB "copies" of the NOR Flash and the last (upper) word of the NOR Flash will appear as the last word of the 4GB address space (0xFFFF_FFFC).
Also please consider that:
1) MMU has one 4-Kbyte page defined at 0x0_FFFF_Fnnn – refer to the P1010 QorIQ Integrated Processor Reference Manual, 4.3.3 Boot page translation.
2) the core begins execution with the instruction at effective address 0x0_FFFF_FFFC.
You wrote:
> if it is 0xEFF4_0000 can anyone explain how mapping done.
The mentioned NOR Flash programming sequence corresponds to U-Boot.
The following row from the NOR Flash mapping table (Table 1. Memory Map Address) has a long-lasting typo:
0x001f_0000 | 0x01ff_ffff | Bootloader and env | 1 MB |
correct version is:
0x01f4_0000 | 0x01ff_ffff | Bootloader and env | 1 MB |
You wrote:
> How does Processor jump to start address of uboot?
Please note that after reset the IFC_CSPR0[V]=1 and IFC_AMASK0[AM]=0 (Memory Bank Size 4GB) – i.e. in case of the P1010RDB NOR boot the whole address space (4GB) will "contain" 32MB "copies" of the NOR Flash and the last (upper) word of the NOR Flash will appear as the last word of the 4GB address space (0xFFFF_FFFC).
Also please consider that:
1) MMU has one 4-Kbyte page defined at 0x0_FFFF_Fnnn – refer to the P1010 QorIQ Integrated Processor Reference Manual, 4.3.3 Boot page translation.
2) the core begins execution with the instruction at effective address 0x0_FFFF_FFFC.
Hi Ufedor,
Nice explanation, I have few more doubts to get enlightenment.
you mean 128 copies(4G/32MB), from which it can choose any one? i.e if I write bootloader to NOR flash using codewarrior then I can dump the image back from different location.
You wrote:
> you mean 128 copies(4G/32MB)
This configurations corresponds to the default memory map at the moment of the first instruction fetch.
NOR Flash programming is performed when default memory map is replaced by a "work" one when the flash is mapped to a single area in the processor's address space.
CodeWarrior performs a board configuration script, U-Boot executes dedicated code for this purpose.
For U-Boot effective address (EA) for NOR flash is 0xEE00_0000 ~ EFFF_FFFF.
Hi Ufedor,
Then why in codewarrior when I tried to flash bootloader to NOR flash, has the target address as 0xFE000000 (default tcl file).
The SDK documentation describes U-Boot memory map.
The CodeWarrior TCL has different mapping - the NOR Flash base address is 0xFE000000.