P1010/4 TBI SGMII

[renaud]

The P1010RDB makes use of SGMII interface on eTSEC2 and eTSEC3.

What determine the use of register 4  (and also 5)as being the 1000BASE-X ANA or as ANA_SGMII?

In U-Boot the value 1a0 is written to register 4 which to seem to  be for the 1000BASE-X ANA, though the interface is SGMII.

So why is it not the value 0x4001 as described in AN3869?

Cheers,

Note: We currently have our design using a P1014 and BCM54616 in SGMII mode. At present I cannot get a link to work between the TBI PHY and external PHY.

[bpe]

The appnote is more correct than u-Boot code. What you write to ANA is the response the other side of autoneg receives from the controller. The value recommended in  the appnote is the normal confirmation from the MAC to

the PHY for autoneg type SGMII.  Some PHYs tolerate incorrect MAC autoneg response or do not need it at all to transition to SGMII link up state, that is why  u-Boot code works. u-Boot Ethernet code for later, DPAA-enabled

chips write the correct value to ANA.

If you suspect your PHY behaves incorrectly due to unexpected SGMII autoneg response, check with it's documentation what response (if any)  it wants, and adjust TBIANA_SETTINGS macro as necessary.

Have a great day,

Platon

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[marcharbonne]

Hi Renaud,

I think we have the same problem.

On our previous version with linux 2.6, all worked as well, now after an upgrade to 3.10 , the broadcom side doesn't see the link up.

I have a jtag connected, I just played with the MACCCFG2 register. (like switch to nibble mode and back to byte mode) and suddently the link became up on the broadcom side.

But no traffic is seen.

Can you maybe show me your DTS

Marc