How do you implement the Random Number Generator on the P5040 Security chip?

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How do you implement the Random Number Generator on the P5040 Security chip?

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jaywal
Contributor I

I have followed the P5040 SEC manual to instantiate a state handle in order to generate a random number, but I seem to run into various errors depending on the combinations of commands I write out. Currently, I am using a Header, Algorithm, and FIFO Store command to issue the instantiate setup for the state handle. That seems to pass without error, but upon trying to issue the Header, Algorithm, and FIFO Store command for generate, we get an RNG error that says Hardware Error according to the spec. Any ideas of how to troubleshoot this?

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ufedor
NXP Employee
NXP Employee

Please refer to the Linux SDK Documentation, SEC Device Driver User Manual:

Submit Form 

and the CAAM RNG driver source:

linux/caamrng.c at c4881840f02f6070dede14a698e6feedd586be9b · qoriq-open-source/linux · GitHub 

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jaywal
Contributor I

Is there a way for you to provide us the descriptor commands used to instantiate the state handle and generate the random number? We are using SEC 5.2. We are still getting errors when instantiating the state handle and attempting to generate the random number. Having the sequence would allow us to figure out what is going wrong exactly. Thanks!

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ufedor
NXP Employee
NXP Employee

Sorry, we have only SDK.

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