imx93 MIPI DSI no clock signal

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imx93 MIPI DSI no clock signal

770件の閲覧回数
Paolo3C
Contributor I

Hi,

I enabled with success the MIPI DSI interface for ILI9881C display driver. The interface work with 2 lanes and clock. After boot, the kernel initialize drm and dsi with success and connect the ili9881c with dsi. All the two lanes are driven with signals that I checked with oscilloscope, but clock lines remain static a 200mV, no clock signal on both P and N pins.

I'm using Compulab BSP Release ucm-imx93 3.0 25.02 based on NXP i.MX Release Distro 6.6-scarthgap ucm-imx93 ttyLP0

 {
dsi_backlight: dsi_backlight {
compatible = "pwm-backlight";
pwms = <&tpm4 2 50000 0>;
brightness-levels = <0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 
68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100>;
default-brightness-level = <98>;
status = "okay";
};
};
 
&iomuxc {
pinctrl_tpm4: tpm4grp {
fsl,pins = <
MX93_PAD_GPIO_IO13__TPM4_CH20x59e
>;
};
};
 
&tpm4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tpm4>;
status = "okay";
};
 
&ldb {
status = "disabled";
};
 
&ldb_phy {
status = "disabled";
};
 
&lcdif {
assigned-clock-rates = <300000000>, <100000000>, <400000000>, <133333333>;
status = "okay";
};
 
&dsi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
 
panel@0 {
compatible = "bananapi,lhr050h41", "ilitek,ili9881c";
backlight = <&dsi_backlight>;
enable-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
reg = <0>;
dsi-lanes = <2>;
video-mode = <2>;
panel-width-mm = <87>;
panel-height-mm = <87>;
status = "okay";
 
panel-timing {
clock-frequency = <50000000>;  /* LCM_PCLK */
 
/* X */
hsync-len     = <24>;   /* LCM_HSA */
hback-porch   = <100>;  /* LCM_HBP */
hactive       = <800>;  /* LCM_HACT */
hfront-porch  = <50>;   /* LCM_HFP */
 
/* Y */
vsync-len     = <4>;    /* LCM_VSA */
vback-porch   = <20>;   /* LCM_VBP */
vactive       = <800>;  /* LCM_VACT */
vfront-porch  = <8>;    /* LCM_VFP */
};
 
port {
panel_in: endpoint {
remote-endpoint = <&dsi_out>;
};
};
};
 
ports {
#address-cells = <1>;
#size-cells = <0>;
 
port@0 {
reg = <0>;
dsi_input: endpoint {
};
};
 
port@1 {
reg = <1>;
dsi_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
 
&dphy {
status = "okay";
};

 

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178件の閲覧回数
Paolo3C
Contributor I

Hi @Chavira ,

I removed all the resistors and checked the connector connections; now the display shows images. However, there is a strange error across all views: the display shows two lines on and two lines off. I tried changing the number of lanes from 2 to 3 and adjusting the clock frequency, but the issue persists. Please see the attached image.

Could this be related to incorrect wire impedance? There are also some other artifacts, especially on white color bar, but I believe they all originate from the same problem

Thank you,

Paolo

IMG_3656.jpeg

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717件の閲覧回数
5454ty
Contributor II

HI,

  I hava a look the message by you 

  My problem was solved and the reason is the resistance

 Finally ,i deteleted the resistance and get the solving

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709件の閲覧回数
Paolo3C
Contributor I

Hi, thank you for your quick reply.Are you referring to the series resistance?

Also, my hardware designer placed a 22Ω series resistor on all lanes and the clock signal.

I will try removing all of them

thank you 

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763件の閲覧回数
Chavira
NXP TechSupport
NXP TechSupport

Hi @Paolo3C!

Could you please confirm whether the baseboard you're using is from CompuLab or if it's a custom design?

Also, are you certain that the measurements are being taken at the correct test points?

Is the display functioning properly, or have you noticed any issues?

 

Best regards,
Chavira

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708件の閲覧回数
Paolo3C
Contributor I

I’m using a custom board.

The hardware designer placed a 22Ω resistor in series on all lanes and the clock signal.

Could this be the problem?

dsi lanes.png

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677件の閲覧回数
Paolo3C
Contributor I

I removed all resistors, but nothing change, the 2 mipi dsi lanes are ok, the clock is not present.

I never seen the display active. If I stop Weston service and run modetest I can see the pattern of data on all lanes but clock P and N remain at 200mV.

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666件の閲覧回数
Chavira
NXP TechSupport
NXP TechSupport

Hi @Paolo3C!

I've observed the same behavior on my side, and I believe it's due to the following reason:

To properly measure MIPI signals, you need specialized equipment. Here are some key recommendations:

 

  • Use a high bandwidth oscilloscope, ideally, one that supports at least 4 times the frequency of your target signal.

  • Use a differential probe, these are essential for MIPI signals due to their high impedance and low capacitance, which help preserve signal integrity.
  • If the drivers are correctly loaded but you're still not seeing an image, you may need to debug the driver and configuration settings to ensure the display is properly initialized.

 

Best regards,
Chavira

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