We are developing a custom i.MX8MP-based board for an automotive camera system. We have a working single-camera H.264 RTP streaming pipeline using the VPU hardware decoder on our 5.15.71 NXP Yocto BSP. We are now planning to scale to 4 simultaneous camera streams via an Ethernet switch. The switch will aggregate 4x 100BASE-T1 camera ports and connect to the i.MX8MP EQOS MAC via a gigabit RGMII uplink, with each camera isolated on its own VLAN.
Our display is 1280x800. For 4-stream simultaneous view each stream only needs to fill a quarter of the display (~640x400 or lower @30 fps), so we can scale camera resolution down as needed.
1. Is there an NXP i.MX8MP reference design or application note covering multi-channel video decode that we can use as a starting point?
2. Can the H.264 VPU decoder handle multiple independent instances from separate sources, or is a pre-decode composition step required to reduce the number of processes and context switches? If composition is required, what is the recommended approach on i.MX8MP?
3. What is the overall recommended software architecture for this use case from NXP's perspective?
Our future application is surround view, so scalability and low latency are key requirements.
Thanks!
