Setting the lvds panel mode configuration

[devireddy_t]

Hello everyone,

I am trying to convert eDP to LVDS using the PTN3460 chip. We are almost there — the display is turning on, but we are seeing garbage output when using the LVDS dual channel 18bpp format. Can anyone help us get a proper display output without the garbage.

[TomasVaverka]

Hello.

The issue you are facing is likely due to configuration mismatches or panel compatibility.

Many panels do not support 18bpp dual-channel. They expect 24bpp dual-channel instead. Try switching to 24bpp dual-channel and see if the garbage disappears.

Check if your panel expects JEIDA or VESA mapping and configure the PTN3460 accordingly.

Ensure the following registers are correctly set:
LVDS_CTL – for enabling dual-channel and selecting bit depth
LVDS_BPC – for bits per color (6bpc for 18bpp, 8bpc for 24bpp)
LVDS_MAP – for JEIDA/VESA mapping

Confirm that the timing parameters (pixel clock, sync polarity, porch values) match what the panel expects. If you are using EDID emulation, make sure the EDID matches the panel’s native mode.

Hope it helps.

BRs, Tomas

[devireddy_t]

Hello 
I am using for the first time can u please give me proper steps for 24bpp and how to set correct edid values.