Setting the ESAI modules on DSP56725 second core

[sec_FBT]

Hi all,

I'm finding some problems in the configuration of the ESAI modules of the second core on DSP56725 (80 pin package).

I've set successfully the ESAI module of the first core, where I use a channel to receive data and 5 channel for the outputs. I've set the modules in synchronous mode for receiver and transmitter (SYN bit on SAICR register) and the EICCR register to connect the 2 modules on the clock line.

Now I've tried to repeat the configuration on the second core, but here it seems that the ESAI_2 module can't reach the clock lines of the ESAI_3. I've tried successfully on the first core all the possible configurations and connection for the ESAI, but on the second core I can't repeat any configuration to put in operation the ESAI_2 .

On the first core, I've tried to control the clock line, connected on ESAI, with the ESAI_1 register, and each module works perfectly. On the second core, I can control the clock line only with ESAI_3 register (no success with ESAI_2), and even in this case the ESAI_2 seems to be disconnected from the clock line, even setting the EICCR register.

I've no idea about a possible solution....

Please help me, I'm going crazy!!!

[mbunke]

Hi sec@FBT,

I am trying to get started with the DSP56725 and until now, for me the ESAIs on core0 only worked with HCKR connected to DSP. If that is true for you, too, your problem could be that there is no HCKR_3 pin on 80pin version of DSP56725, so ESAIs on core1 will not work as receivers in such a configuration.

If that's not your problem or you solved it: How did you configure ESAI, so you don't need HCKR for receiving audio data?

Regards,

Mike

[mbunke]

Sorry, I didn't notice you are using SAICR>SYN, so you don't need Rx clocks (like HCKR_x).

Did you solve the problem? It would be interesting to know what the fault has been...

[sec_FBT]

Thx mbunke for your interest and sorry for the lack of news about this problem but I had to give up my research for some times...

Anyway in a few days I'll restart my job on second core ESAi module.

I wrote to freescale support, but it seems that the dual core platform is not in his possessions, so he couldn't repeat my problem and so I've not a solution yet...

Furthermore, freescale have closed my service request and then I must re-open a new one...

I'll keep you up to date about this problem, see you next days...

[rocco]

Hi Sec,

I'm using the DSP56721 (not the 25), but I also had problems with the clocks on the ESAI, but on core-0. I was running ESAI-0's clock from EXTAL through the internal routing, and the ESAI was simply not behaving correctly (it would run, but would interrupt constantly, instead of after each word, when it should). At the time, I had no idea the problem might be related to the clocking.

I filed a service request, and tech-support could not reproduce the problem, even running my code. I later found out that they were running my code on a non-dual core DSP (a DSP563xx) as they didn't even have a DSP56721 available. They said that the ESAI was identical in the two chips, but obviously they are not. After a few months, the service request was closed, unresolved.

I then found in the data book a mention that certain internal clocking arrangements could be "unstable". I added wires to my board to route the clocks externally, and all of my problems went away. Who would have thought that clocking would cause an interrupt problem. I am currently running ESAI-0 on core-0 and ESAI-3 on core-1 synchronously from the same external clock that drives EXTAL.

The two things I learned:

Don't trust the internal clock-routing for the ESAI, and

Don't depend on tech-support for a solution.

Sorry if that doesn't help you much. It's is simply what I needed to go through to get my ESAI to work.

[sec_FBT]

Thanks Rocco for your reply, but my problem is in another...

I'm using an external clok to obtain the ESAI clocks, but the ESAI_2 seems not to access to ESAI_3 clock (on 56725 80-pin package ESAI_2 clock pins are not present) even if i've set the EICCR register to connect ESAI_2 clock to ESAI_3.

This problem is not present on the first core, that operate correctly with every possible configuration on the connections between the two ESAI module...

[Nikko]

What pin of ESAI_2 are you using? ESAI_2 has 4 data lines and that's it.

2 of these are multiplexed with the SPDIF in/out, and this is basically the difference between ESAI_2 and ESAI_1.

Could it be a pin configuration issue? (Just a wild guess)

Nick

[sec_FBT]

I'm using one pin of ESAI_2 module as an input (SDO4_2/SDI1_2); this pin must drive an interrupt on received data.

I've controlled a lot of times the configuration of each register of the second core, and I didn't find anything that could justify this malfunctioning.

[Nikko]

The pin you're referring to is not used at any time by the SPDIF module, so what I was suggesting doesn't hold.

Please let us know when you solve your problem!