SJA1105TEL Port0 in RMII-PHY mode

[haiyang]

hi ,

i use the SJA1105TEL port0 in RMII-PHY mode,connect to a MCU RMII;

the sja1105TEL REF_CLK pin as input ,receive the clk signal from mcu.

and i set the register  as follow :

PLL_1_1 = 0x0A010941

IDIV_0_C = 0x0A000001

the xMII Mode Parameters table (block 4Eh) value :0x400A0000

the the MII0_RMII_REF_CLK , i try to set 0x0E000800 and 0x00000800,are can't receive packet;

read the PORT_STATUS_MII0 register value is 0x0000000D;

And the port 1port 2port 3 are ok ,they can receive ethernet packet ,only the port0 can't 

receive packet.

the picture is my hardware connect

Is there some problem with my Settings?

haiyang

[kaden]

Hi @haiyang , 

A few remarks: 

1. In case you mean PLL_1_C register by mentioning "PLL_1_1", it seems that the PD (power-down) bit is set to 1 which means PLL1 is disabled. PLL1 is used in your case to clock internal RMII functionality. 

2. MII0_RMII_REF_CLK should be set to 0x00000800 to set CLKSRC to TX_CLK_0. IDIV_0_C should be 0x0A000001, so this is fine on your end. 

BR

Kevin