Hi @sg_TP ,
Thank you so much for your interest in our products and for using our community.
I have reviewed the available documentation and did not find any official NXP material that provides quantified performance benchmarks for eRPC over SPI (for example, throughput, latency/round-trip time, or CPU load).
Please note that eRPC is not equivalent to raw SPI transport performance. As a higher-layer RPC framework running on top of SPI, its overall performance is influenced by additional factors such as serialization/deserialization, protocol framing, synchronization, and software scheduling.
In practical designs, eRPC communication over SPI is also not just a simple SPI data transfer. It typically requires one or two additional GPIO signals for handshake or data-ready synchronization to ensure proper coordination between the two MCU.
In addition, performance can vary significantly depending on the platform (for example, i.MX RT, LPC, MCX), as well as system-level factors such as CPU performance, cache, SPI+DMA capability, memory architecture, and application characteristics (payload size, call frequency, buffering strategy...).
As a practical approach, I recommend first evaluating the baseline SPI performance using SPI + DMA examples from MCUXpresso SDK or Zephyr SPI samples. Based on that baseline, the eRPC layer can then be added to assess the additional protocol overhead.
Best regards,
May