Questions regarding T2081(T4240) PCI Express driver code.

[rajvad]

Hi,

I am looking for the T2081 based PCI-Express driver code. I got the equivalent T4240 PCI express driver code from the link shared by NXP:

https://www.nxp.com/products/processors-and-microcontrollers/power-architecture/qoriq-communication-....

I have a few questions regarding the same:

With respect to the PCI-Express module in the code,

-There is an End point agent for 8569(Init8569AgentDeviceForDdr3() )  and for 1023(Init1023AgentDevice() ), but there is no agent for T4240. Is there a reason for that?

-For the function OpenHostOutWindow(), the base address is got by MM_GET() which, it seems, gets the memory allocated from the heap and then gets a Virtual address assigned to this allocated address. Also the translation address is also got by MM_GET(). Is there a logical reason for this? Should not the translation address be pointing to the actual PCI device address?  

-Also, For the OpenHostInWindow, the translation address is got by MallocSmart() which allocates memory in the T4240 RAM DDR_NON_CACHEABE space and the base address is got by MM_GET(). In this case I understand that the translation address should point to the internal host memory space but where should the base address be pointing to?   Can you please clarify the above? Thanks very much for the same.

thanks and regards,

Rajkumar

[yipingwang]

a) The QorIQ T4 family of processors offers the highest performance for networking application and is commonly used as a PCI host.

b) For OpenHostOutWindow(), suggest customer refer to the MM_Init() function and two invocations as below in order to futher understand the memory manage intent.

/* Initialize a memory manage object to manage PCI virtual memory space for this bus*/
retVal = MM_Init(&p_PciBus->h_PciVirtMemMng, PCI_VIRT_SPACE_BASE, PCI_VIRT_SPACE_SIZE);

/* Create MM object for the all pci memory space */
rc = MM_Init(&(p_PciCtrl->h_PciOutboundMem),
XX_VirtToPhys((void*)p_PciCtrl->localAccessWindowBase),
p_PciCtrl->localAccessWindowSize);


c) For OpenHostInWindow(), the base address depends on the partitionId(e_MEM_1ST_DDR_NON_CACHEABLE) as below,
p_DevDriverData->p_InTransAddr[0] = (uint8_t *)
XX_MallocSmart(size, e_MEM_1ST_DDR_NON_CACHEABLE, size); /* 16M DDR */

/* Master memory partitions */
#ifdef NCSW_64_BIT_ARCH
#define MEMORY_INFO \
{ /* Region ID Memory partition ID Phys. Addr. Virt. Addr. Size */\
{e_PLATFORM_MEM_RGN_DDR1, e_MEM_1ST_DDR_CACHEABLE, 0x00000000, 0x00000000, (1 * GIGABYTE) },\
{e_PLATFORM_MEM_RGN_DDR1, e_MEM_1ST_DDR_NON_CACHEABLE, 0x40000000, 0x40000000, (512 * MEGABYTE) },\