Porting uboot on custom card

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Porting uboot on custom card

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rashmikj
Contributor III

Hi, I am trying port Uboot in QSPI flash of custom card based on LS1046 processor using TF -A Boot Flow. The system stops after BL31 Phase.

NOTICE: Fixed DDR on board

NOTICE: 4 GB DDR4, 64-bit, CL=15, ECC on

NOTICE: BL2: v1.5(release):LSDK-20.04-update-290520-dirty

NOTICE: BL2: Built : 05:19:45, Mar 17 2021 NOTICE: BL2: Booting BL31

NOTICE: BL31: v1.5(release):LSDK-20.04-update-290520-dirty

NOTICE: BL31: Built : 05:26:59, Mar 17 2021

NOTICE: Welcome to LS1046 BL31 Phase

I am trying to generate fip.bin file using flex-builder -c atf -m ls1046ardb command. After building uboot , in which folder do i need to copy the bin file ? which defconfig file do in need to build to generate the uboot.bin file?

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yipingwang
NXP TechSupport
NXP TechSupport

In Target Connections panel, please double click LS1046A-RDB(1), click "Target Initialization File", in CodeWarrior initialization file, please modify the following line 

# Add QSPI device
fl.add_device({"alias": "qspi", "name": "S25FS512S", "address": 0x40000000, "ws_address": 0x10000000, "ws_size": 0x1FFFF, "geometry": "8x1", "controller": "QSPI"})

Modify to:

fl.add_device({"alias": "qspi", "name": "MT25QU512ABA", "address": 0x40000000, "ws_address": 0x10000000, "ws_size": 0x1FFFF, "geometry": "8x1", "controller": "QSPI"})

Device MT25QU512ABA has been integrated in folder C:\Freescale\CW4NET_v2020.06\CW_ARMv8\Config\flash\devices.

 

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yipingwang
NXP TechSupport
NXP TechSupport

In u-boot source code, the configuration ls1046ardb_tfa_defconfig is used to build u-boot, you could get uboot_ls1046ardb_tfa.bin in folder build/firmware/u-boot/ls1046ardb/uboot_ls1046ardb_tfa.bin.

Please modify u-boot source code in packages/firmware/u-boot according to your custom board.

Probably you need to modify configs/ls1046ardb_tfa_defconfig, board/freescale/ls1046ardb/ and include/configs/ls1046ardb.h.

Then rebuild u-boot and atf, go to folder ~/flexbuild_lsdk2004, execute the following command.

$ rm -rf build/firmware/u-boot/ls1046ardb/

$ flex-builder -c atf -m ls1046ardb

You will get bl2_qspi.pbl and fip_uboot.bin in folder build/firmware/atf/ls1046ardb.

Flash bl2_qspi.pbl:
=> tftp 0xa0000000 bl2_qspi.pbl
=> sf erase 0x0 +$filesize && sf write 0xa0000000 0x0 $filesize
Flash fip.bin:
=> tftp 0xa0000000 fip_uboot.bin
=> sf erase 0x100000 +$filesize && sf write 0xa0000000 0x100000 $filesize

In addition, where did you modify based on the source code for LS1046ARDB?

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rashmikj
Contributor III

Hi,

I modified ls1046ardb_tfa_defconfig as per our custom board and generated the fip.bin. this is log messages generated.

INFO: RCW BOOT SRC is QSPI
INFO: RCW BOOT SRC is QSPI
INFO: time base 5 ms
NOTICE: Fixed DDR on board
INFO: Time after parsing SPD 4 ms
INFO: Time before programming controller 8 ms
NOTICE: 4 GB DDR4, 64-bit, CL=15, ECC on
INFO: Time used by DDR driver 427 ms
NOTICE: BL2: v1.5(debug):LSDK-20.04-update-290520-dirty
NOTICE: BL2: Built : 09:24:41, Mar 22 2021
INFO: Configuring TrustZone Controller
INFO: Value of region base = ffe00000
INFO: Value of region base = 1ffe00000
INFO: Value of region base = fbe00000
INFO: Value of region base = 980000000
INFO: BL2: Doing platform setup
INFO: BL2: Loading image id 3
INFO: Loading image id=3 at address 0xfbe00000
INFO: Image id=3 loaded: 0xfbe00000 - 0xfbe0c644
INFO: BL2: Loading image id 5
INFO: Loading image id=5 at address 0x82000000
INFO: Image id=5 loaded: 0x82000000 - 0x820b694c
NOTICE: BL2: Booting BL31
INFO: Entry point address = 0xfbe00000
INFO: SPSR = 0x3cd
NOTICE: BL31: v1.5(debug):LSDK-20.04-update-290520-dirty
NOTICE: BL31: Built : 09:20:18, Mar 22 2021
NOTICE: Welcome to LS1046 BL31 Phase
INFO: ARM GICv2 driver initialized
INFO: BL31: Initializing runtime services
WARNING: BL31: cortex_a72: CPU workaround for 859971 was missing!
INFO: BL31: cortex_a72: CPU workaround for cve_2017_5715 was applied
INFO: BL31: cortex_a72: CPU workaround for cve_2018_3639 was applied
INFO: BL31: Preparing for EL3 exit to normal world
INFO: Entry point address = 0x82000000
INFO: SPSR = 0x3c9

It stops after this . What is the issue. Kindly help.

 

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yipingwang
NXP TechSupport
NXP TechSupport

Please use CodeWarrior to attach to your target board to do read memory 0x82000000.

In CodeWarrior IDE, please create a bare board project from File->New->CodeWarrior Stationery, please build this project from Project->Build Project.

In "Target Connections" panel, please duplicate LS1046A_RDB and configure Target Connection Configuration(CodeWarrior TAP Connection).

Then click Debug->Debug Configurations->GDB Hardware Debugging-><project name>, please configure "Debugger" panel as the following.

yipingwang_2-1616404352374.png

Please configure Startup panel as the following

yipingwang_0-1616404916206.png

 

Then click "Debug" to connect to the target board, then click "suspend" in CodeWarrior IDE.

Then click Window->Show view->Memory, click "+“ to read memory 0x82000000, please check whether you could read similar content as the following.

yipingwang_1-1616405139242.png

 

 

 

 

 

 

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rashmikj
Contributor III

Thanks for the reply

We found the problem. There is problem in spi. We have used MT25QU512 spi flash. it is 512Mb 64KB sector flash. Read/Write in some sector is ok. It is not able to erase read/write in some sector. Is there anyway we an check using code warrior complete SPI flash.

How can i change the device in code warrior flash programmer ??

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yipingwang
NXP TechSupport
NXP TechSupport

In Target Connections panel, please double click LS1046A-RDB(1), click "Target Initialization File", in CodeWarrior initialization file, please modify the following line 

# Add QSPI device
fl.add_device({"alias": "qspi", "name": "S25FS512S", "address": 0x40000000, "ws_address": 0x10000000, "ws_size": 0x1FFFF, "geometry": "8x1", "controller": "QSPI"})

Modify to:

fl.add_device({"alias": "qspi", "name": "MT25QU512ABA", "address": 0x40000000, "ws_address": 0x10000000, "ws_size": 0x1FFFF, "geometry": "8x1", "controller": "QSPI"})

Device MT25QU512ABA has been integrated in folder C:\Freescale\CW4NET_v2020.06\CW_ARMv8\Config\flash\devices.

 

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rashmikj
Contributor III

Sir,

Flash is okay now. DDR is also passing the test with QCVS tool. We tried to import the settings and generated the fip.bin file.Still u boot not coming up.Which all files do we have to change the DDR settings?

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