Thanks, but as stated we are already using the PTN5110NHQ. The issue is that with our production boards the VDD supply is coming up only shortly after VBUS. It is not clear in the PTN5110 datasheet, but reading between the lines, I believe it will only enter dead battery SINK mode if VDD is low at 15ms after VBUS becomes present, which is quite a long time. is this actually the case ?
For a next board iteration, we can look at ways of achieving that, but for now we were hoping that there was a chip that would always enter sink mode on power up as the PTN5110NDHQ sounds like it does, however that chip is obsolete.
The AN12137 document states: "The power-on or default register settings are programmed at the factory into the non-volatile flash memory Multi-Time Programmable (MTP) inside the PTN5110N. These preprogrammed parameters determine the initial behavior of the PTN5110N, e.g., the PTN5110N can behave as Type-C DFP, UFP, or DRP upon power up."
This suggests it is possible to program the default power-up register settings inside the PTN5110N. We are unsure if this is physically possible with the device in-circuit, but if so all we would need is information from NXP on how to do this and it would fix our issue.
