PCIe addresses

[arctanck]

Hi there,

I managed to compile and load pex_digital_loopback demo (CW 10.2) to my 8156 EVM. Everything works fine and I got a "Test passed" message at the end of the program.

What I don't know is which bit of memory space is written to in this loopback demo, i.e. internal or PCIe memory space? Here are the addresses used, but without information on what they correspond to.

#define OUTBOUND_1_BASE              0xa0000000
#define OUTBOUND_2_BASE              0xa1000000

#define OUTBOUND_1_TRANS             0xb0000000
#define OUTBOUND_2_TRANS             0xb1000000

#define INBOUND_1_BASE               0xb3000000
#define INBOUND_BASE                OUTBOUND_2_TRANS
#define INBOUND_TRANS                0x80000000

Just to confirm, is there actually a loopback interface for PCIe on the EVM for testing?

Would really appreciate if someone can help explain what exactly is going on in this demo. As I think understanding the addressing above will help me interface the EVM to an external FPGA board.

Thank you in advance.

Regards,

Chiang

[starcoreDSP]

The source and destination adresses are defined in appBackground() as below:

ocn_dma_transfer_config.destination.addr.full_addr= (uint64_t)OUTBOUND_2_BASE;

ocn_dma_transfer_config.source.addr.full_addr = (uint64_t)(orig_data_buffer);

In this demo, digital loopback mode is enabled, so you don't need an external loopback connector.

[arctanck]

Thanks for the reply. Do you think you can elaborate on how one should decide what address to use and what they represent? For example:

1) What is OUTBOUND_1_BASE?

2) What is the difference between  OUTBOUND_1_BASE and OUTBOUND_2_BASE?

3) What is the difference between  OUTBOUND_x_BASE and OUTBOUND_x_TRANS?

4) How digital loopback mode is enabled?

Regards,

Chiang

[starcoreDSP]

The address definitions in the demo are used to define 1. OCN DMA windows and 2. PCIe inbound and outbound windows.

Please refer to  the attached AN4256 for OCN ATMU and MSC8156-PCIE_Windows for PCIe inbound and outbound windows.

[starcoreDSP]

Digital loopback is defined in msc815x_config.c

pex_init_params_t pex_init_params[] =

{

PEX_PORT0, /**< PEX port number to initialize - forward compatibility */

NULL,

/**< PEX ATMU inbound configuration*/

pex_out_win_config,

/**< PEX ATMU outbound configuration*/

pexDemoGeneralCB,

/**< PEX general error callback*/

PEX_DIGITAL_LB

/**< PEX digital loopback enable*/

};

The LBSEL bits in the SRDS Control Register 2 (SRDSnCR2) is actually used to set digital loop back mode.

[arctanck]

Hi Thanks for the attachments. They are really useful.

So I have burnt the EEPROM using evm_i2c_eeprom_mb_for_pex_lb.eld according to the README file for pex_digital_loopback demo program.

How do I undo the changes so I can test on the PCIe interface properly, setting the RCW accordingly for RC and EP?

I'm aware of i2c_burn_eeprom demo program. But it is written for ADS boards and I have trouble writing to the EEPROM (to undo changes made by evm_i2c_eeprom_mb_for_pex_lb.eld to RCW for example) using i2c, after taking out ADS related header file and functions to get it to compile.

Further assistance will be much appreciated.

Thank you.

Chiang

[arctanck]

Found out that i2c_boot can be used reprogram the EEPROM on the EVM...