PCA9641 not granting bus access

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PCA9641 not granting bus access

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LukeMorton1
Contributor I

Hi,

I'm working on a board that uses PCA9641 to allow multiple Masters to access a downstream I2C bus.

What we're finding is that, in some cases, the arbiter doesn't allow either Master access to the downstream bus.

This seems to correlate with instances where we remove power from Master 1 while a transaction is ongoing (our system isn't capable of doing this to Master 0, so I haven't been able to test that way around); once this has happened, neither Master can gain bus access.

It doesn't look like Master 0 is just holding the downstream bus despite being Off, as all 3 buses (both Masters, and the downstream bus) are High during this period. I can even force a Low on Master 0's SCL line, and it doesn't propagate into the downstream bus. So rather than one Master hogging the bus, it looks like neither can access it.

The datasheet seems to suggest that the only reasons a bus wouldn't be granted to a Master are:

  • The other Master has the bus
  • Both Masters requested at the same time, so the bus won't be granted to the one that loses the arbitration

But there seems to be no reference to circumstances where the arbiter refuses to give the bus to either Master. Is this something that's possible? If so, what are the circumstances under which it can occur?

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RafaR
NXP Employee
NXP Employee

Hi Luke

If both masters try to gain control of the bus at the same time, the arbiter selects a master to own the downstream bus

The problem seems more like you are not allowing Master 1 to properly complete the communication, the PCA9641 keeps waiting for information and does not allow anyone to initiate a new communication.

I recommend you:

1.- Read the datasheet, Chapter 9. Arbitration, follow the rules to disconnect correctly the master 1

2.- Read the datasheet, Chapter 8.2. Register 1: Control register ([B2:B0] = 001b), here you can configurate a timer of 100ms to end all communication when is interrupted

RafaR_0-1741978428067.pngRafaR_0-1741978428067.png

 

 

I hope this information has helped you, please let me know if you need help with anything else.

Have a great day and best of luck.

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LukeMorton1
Contributor I

Hi Rafa,

Thanks for your response. I'd like to clarify some things; please can you confirm if I have understood correctly:

  1. Regarding the rules to disconnect Master 1:
    • The datasheet lists 3 methods for disconnecting a Master, namely sending a STOP, having the bus IDLE for 100ms (if the IDLE timer is set), and writing 0 to LOCK_REQ.
    • As my issue is occurring due to a loss of power to Master 1 (but not the arbiter), neither the STOP nor LOCK_REQ options are available.
    • Does that mean my only means to disconnect is with the IDLE timer (necessitating that I have configured the IDLE timer when requesting the bus in the first place)?
    • The datasheet states that using the IDLE timer is "not ideal". Why is this?
    • What happens if the reserve timer is set, but the IDLE timer is not, once the reserve time expires?
    • Is it possible to check, using Master 0, whether or not the IDLE timer was set for Master 1?
  2. Regarding this statement: "The problem seems more like you are not allowing Master 1 to properly complete the communication, the PCA9641 keeps waiting for information and does not allow anyone to initiate a new communication."
    • Yes, I believe we are losing power to Master 1 in the middle of a transaction, and thus sending an incomplete transaction. Does this in any way invalidate a programmed reserve time or idle timer?
    • Does this state mean that neither Master is connected to the downstream bus? If I use a resistor and switch to force the SCL line of Master 1 low after it has lost power, I don't see the SCL line of the downstream bus go Low. Does this mean the arbiter only connects legitimate transactions (rather than being a pass-through to a Master it has granted)?
    • If we are in this state, is there any way out of it other than using Master 0 to software reset the arbiter (as per Section 13 of the datasheet)?

Thanks,

Luke

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RafaR
NXP Employee
NXP Employee

Hi Luke

1.-

- Your first 2 sentences looks correctly

- Does that mean my only means to disconnect is with the IDLE timer (necessitating that I have configured the IDLE timer when requesting the bus in the first place)?

Are you sure you can't perform a recommended and appropriate disconnect by sending a stop?

- The datasheet states that using the IDLE timer is "not ideal". Why is this?

I2C has its own correct protocol to perform disconnection and this is what everyone should use, but sometimes it is not possible, that is why we have IDLE timer, we cannot recommend IDLE timer because it does not follow I2C process correctly.

- What happens if the reserve timer is set, but the IDLE timer is not, once the reserve time expires?

I don't fully understand this question, the IDLE timer only starts counting after the reservation time expires, you can set the reservation time to a different value, but the IDLE timer is always 100ms which you cannot modify.

- Is it possible to check, using Master 0, whether or not the IDLE timer was set for Master 1?

Each system master controls its own set of registers, however they can also read specific bits from the other system master

RafaR_0-1742508006102.pngRafaR_0-1742508006102.png

 

CONTR, REG#001

 

2-

- Yes, I believe we are losing power to Master 1 in the middle of a transaction, and thus sending an incomplete transaction. Does this in any way invalidate a programmed reserve time or idle timer?

No, they are completely independent.

- Does this state mean that neither Master is connected to the downstream bus? If I use a resistor and switch to force the SCL line of Master 1 low after it has lost power, I don't see the SCL line of the downstream bus go Low. Does this mean the arbiter only connects legitimate transactions (rather than being a pass-through to a Master it has granted)?

- No

- If we are in this state, is there any way out of it other than using Master 0 to software reset the arbiter (as per Section 13 of the datasheet)?

I can only recommend that you follow what is described in the data sheet, sorry.

 

I hope this information has helped you, please let me know if you need help with anything else.

Have a great day and best of luck.

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