PCA9616 FM+ 1 MHZ propagation delay

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PCA9616 FM+ 1 MHZ propagation delay

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Medhat
Contributor I

Dear Experts,

We want to use "PCA9616" in our IO-system project. There will be 25 devices connected on the dI2C bus working on FM+ 1 MHZ. Maximum Cb = 400 pf. The maximum bus length is less than 50 cm but in a harsh environment, so we decided to use the dI2C.


Our question is about the propagation delay on FM+ 1 MHZ. From the datasheet:

Max. Tphl (single-ended side to differential side) = 120 ns.
Max. Tphl (differential side to single-ended side) = 150 ns.

Which leads to, total maximum propagation delay of master to slave path = 270 ns.
The return path from slave to master (for example to send ack. or data) = 270 ns.

Accordingly, the total maximum propagation delay of the round-trip path = 540 ns.

I understand that slave must put the reply (ack. or data) on the falling edge of the clock and the master must read this data on the rising edge of the clock. This period <= 500 ns on 1 MHZ.
So, if I correctly understand then the device "PCA9616" will not work on FM+ 1 MHZ.

Please explain to us what correct propagation delay on FM+ 1 MHZ is? And how we can use "PCA9616" on this speed.

Regards,
Medhat.

 

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guoweisun
NXP TechSupport
NXP TechSupport

I think you have correct understanding for this topic, it indeed can't up to 1MHz because of the delay, you can get the more info about this explain in datasheet:

Due to the SMBus/I2C-bus handshake protocol (ACK/NACK on the ninth clock pulse), the
direction of the SMBus/I2C-bus is reversed often. The ‘time of flight’ for the signals to pass
through each bus buffer and for the target slave to respond defines the maximum speed of
the bus, regardless of how fast the clock toggles. The dI2C-bus section of the bus requires
two additional PCA9616 bus buffers, further delaying the SMBus/I2C-bus traffic. If the
dI2C-bus transmission line section is made longer, the bus will operate much slower,
regardless of the clock toggle speed.

 

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guoweisun
NXP TechSupport
NXP TechSupport

I think you have correct understanding for this topic, it indeed can't up to 1MHz because of the delay, you can get the more info about this explain in datasheet:

Due to the SMBus/I2C-bus handshake protocol (ACK/NACK on the ninth clock pulse), the
direction of the SMBus/I2C-bus is reversed often. The ‘time of flight’ for the signals to pass
through each bus buffer and for the target slave to respond defines the maximum speed of
the bus, regardless of how fast the clock toggles. The dI2C-bus section of the bus requires
two additional PCA9616 bus buffers, further delaying the SMBus/I2C-bus traffic. If the
dI2C-bus transmission line section is made longer, the bus will operate much slower,
regardless of the clock toggle speed.

 

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Medhat
Contributor I

Dear Guoweisun,

Thanks for your reply and explanation.

Then, according to the PCA9616 propagation delay and with fast slave response PCA9616 may optimistically work up to 800 KHZ in our application. More practical tests are required to find the best speed on longer distances.

Regards,

Medhat.

 

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