PCA9615 fails after short time

[PFEQ]

Hello

I'm having a serious problem with my design using PCA9615. In my application the PCA9615 is used to facilitate I2C communication over ~3m FTP cable between two devices master and slave. Relevant parts of the schematic are attached to this post.

Notes to the design:
- On the master side Vdd(A) is permanently connected to 3.3V. Vdd(B) is connected to 5V derived from 24V rail, that can be switched on and off by master. EN is driven by the master at 3.3V
- Slave side is powered by 24V provided by the master. Vdd(A) is 3.3V, Vdd(B) is 5V, both rails are derived internally from 24V. EN is connected to 3.3V rail permanently.
- Design DOES NOT use hot-swap functionality, both boards are permanently connected
- Grounds are connected between master and slave, therefore ground offset is neglible
- Speed of the interface is 100kHz

How it's supposed to work:
- The 24V rail powering slave is generally provided at all times, possibility of turning it off is provided only as a last ditch effort to reset remote I2C devices in case of malfunction or stuck bus
- EN pin is used to isolate slave I2C bus when communication is happening internally only on master board

Whats wrong:
- After powering up, regardless of EN pin status, the device gets hot drawing significant current through the Vdd(B) pin (which causes additional problems). In this state, the device is set up to fail. It could happen immediately, or as long as around 5 days. Last pair of devices lasted exactly 24 hours.
- Most (but not all) failed chips have measurable resistance between Vdd(B) and GND. Among failed chips currently on my desk there shorts as low as 2Ω and as high as 700Ω.
- Chips on the master side fail sooner and more frequently than those on the slave side.
- Before failure, communication part works perfectly - no issues here.
- Disconnecting two boards when powered (as a test or accident) GUARANTEES immediate failure. The status of EN pin doesn't matter. Tested on bench with very short cable. Both chips fail immediately. It's not used in the design, but concerning anyway. This chip should prevent that from happening.
- With 24V rail disabled (and therefore Vdd(B) and entire slave) nothing bad happens but my device doesn't work either

Not going to lie, I'm getting pretty desperate with this project. It is the only point of failure in the entire design which involves a lot of hardware. I've already destroyed around 20 pieces of PCA9615 so far because of this issue, and I'm completely stuck.

What could be the problem? Incorrect termination? Different power supplies for VddA and B? Incorrect powering up sequence? Faulty chip (bought from Mouser)? As I can see on this forum and others, this is a somewhat common problem.

Would appreciate any help
Best regards
Jan Kozieł

[PFEQ · Accepted solution]

I've found what the issue was.

There was brief ~2V voltage overshoot on 5V regulator powering Vdd(B) on slave side every time the 24V rail was turned on. This over-voltage usually didn't do anything to slave side PCA9615 because it was powered by it, but it came back over differential lines and damaged master side PCA9615 powered by different 5V supply. This resulted in low resistance short between one or both differential pairs to Vdd(B) and forced significant current through the chip resulting in its subsequent destruction. Resistance of the short and amount of pins shorted varied, so the self heating and consequently survival time as well.

It was hard to find out because communication worked before complete failure of the chip. However the differential voltages were way above what they should be (~3,5V), because short in one of the chips. Soldering small 5V TVS diode across supply solved the issue on already finished board.

I hope someone learns from my mistake. Topic could be closed.

However i have to say, those chips are quite fragile for intended purpose as interface device.