PCA2129 RTC interupt not occuring

[wecunningham]

I am using a PCA2129 with a Microchip SAMV71 controller as a master clock for other devices. I am prototyping with a SAMV71 Xplained board and have connected the following pins between the two devices:

SAMV71 EXT1-11 (I2C data) to SDA
SAMV71 EXT1-12 (I2C clock) to SCLK
SAMV71 EXT1-7 (GPIO) to /INT (configured as input with a falling edge interrupt and internal pull-up resistor)
My setup procedure for the PCA2129 is as follows:

• Send the following data via I2C to configure the RTC chip to enable the 24-hour clock and 1 second interrupt.
  • [I2C address = 0x51, write bit = 0, register = 0x00, data = 0x01, 0x00, 0x00, 15 seconds in BCD, 30 minutes in BCD, 1 hour in BCD]
• Send the following data via I2C to start the 24-hour clock with 1 second interrupt.
  • [I2C address = 0x51, write bit = 0, register = 0x00, data = 0x01]
• Send the following data via I2C to set the interrupt to pulse mode instead of requiring manual clearing.
  • [I2C address = 0x51, write bit = 0, register = 0x10, data = 0x20]
• Perform a test read from the RTC.
  • [I2C address = 0x51, write bit = 0, register = 0x03]
  • [I2C address = 0x51, read bit = 1] and read three bytes

The attached file shows a trace from when I do the above.  The yellow trace is I2C clock the green trace the data and the blue oscilloscope shows the /INT line.  It appears to show a valid read back from the chip.  However, I do not observe any activity on the /INT line—it remains high.

Can you help me understand why the /INT line is not pulsing as expected, or suggest what I might be missing in my setup?

[ErikaC]

Hello,

The Control_1 register (0x00) should have the SI (Second Interrupt) bit set if you want a 1-second interrupt. You wrote:

[I2C address = 0x51, write bit = 0, register = 0x00, data = 0x01]

This sets only the STOP bit to 0, but may not enable the SI bit. You might need to write:

[I2C address = 0x51, write bit = 0, register = 0x00, data = 0x21]

If this does not work, please confirm how Control_1 register is configured.