MPC5645s QuadSPI EMC Problems

[sebastiangraf]

We are using the QuadSPI-Interface via PF[10]..PF[15] Pins. We drive the interface on 61MHz. On the other side there is a QuadSPI Flash from Spansion We have EMC spikes Issues on multiplied frequencies e.g. 682MHz. It can be measured that the clock line is mostly cause with highest emc in near field mesaurement. We have series resistors in line and can controll overshot with them, but this does not bring improve in the device's EMC. I checked the registers and found the possibility for making pin's rise times slower, but this does not work on clock lines.

Besides optimizing the layout --which might not help much as playing with the series resistors did not help- do you see any other settings which might help?

Thanks for ideas,

Sebastian

[PetrS]

Hi,

really hard to suggest anything. You are right that on the CLK line you cannot control the slew rate in respective PCR register as it is the fast pad type, or better you can change the SRC field but it has no effect for fast pad.

You may try to decrease the QSPI speed to see if the EMC spikes moves, or disable the QSPI to know it is really the root cause. BTW 682MHz doesn't look to be a multiplied frequency of 61Mhz, maybe 62.

You can try to attenuate the high frequencies with a simple R-C low pass filter immediately after anything that drives a line. This is in part what the series resistors are doing. It forms a low pass filter with the parasitic capacitance of the line. It may be not enough. This can be fixed with some deliberate capacitance on each line. So try to put some pF as close as possible after the resistor on CLK line.

BR,

Petr