I checked your schematics. It should be stable by design. However, the circuit layout and mechanical design are important to avoid unwanted parasitic feedback.
Make precautions during initial amplifier turn-on. You can discover abnormal behavior before it will damage the device. Read appnote from Polyfet "Precautions for RF Power Transistors":
http://www.polyfet.com/rftopics.pdf
The Most Common High Power RF Design Error: Inadequate Back-Side Grounding of the Source Contact Connection
https://mwexpert.typepad.com/freescale/2011/01/the-most-common-high-power-rf-design-error.html
> a short circuit between the gate and the source, measuring a resistance of 30 Ohm.
It is usual indication of Electric Over Stress or thermal run out. Transistor would fail if it's absolute maximum ratings are violated (junction temperature, gate and drain voltage, drain current).
- poor thermal management may cause fail due to high junction temperature
- overvoltage at the drain and gate pins
- overvoltage at the drain due to operation at high VSWR (no load or short). It doesn't cause direct electric damage but causes excess power dissipation and may cause thermal issues.
- parasitic oscillations occur at arbitrary frequency for which circuit is not designed. It may cause similar effects as high VSWR.
- strong voltage spike may cause latch-up of internal parasitic bipolar device. Typical reasons are spikes at the supply rail or ESD event during device operation. Duration is not important. Even a short ~nsec event may cause the problem. The key parameter is the current of the spike.
https://www.nxp.com/docs/en/white-paper/50VRFLDMOSWP.pdf
Have a great day,
Pavel
TIC
