Inconsistency between simulation and datasheet value - AFIC102775

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Inconsistency between simulation and datasheet value - AFIC102775

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MohMor
Contributor III

Hello,
I am using AFIC10275 large-signal model. 

you've mentioned the IDQ2 as 150 mA in the datasheet, whereas in s-parameter simulation results, I found out that IDQ2 must be 800 mA to in order to have approximately 30 dB power gain. the more surprising point is that IDQ2 was written 800 mA in s2p file. Moreover, you can see that datasheet mentioned gate bias voltage, VGG, for stage 2 as about 6-7 volts, whereas in simulation I get about 2.4 volts for both gate voltages.

can you please clarify the condition?

Best regards,

Thank you

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ErikaC
NXP TechSupport
NXP TechSupport

Hello,

 

Sorry for the delay in replying.

Regarding IDQ2, It has do with the class of operation for the Transistor.  We normally operate the transistors in Class AB mode, with very light bias, this will improve the efficiency of the part in large signal operation. But does have the downside of a nonlinear drive up response. There is a lot of gain expansion as the transistor is operated from low output power to full saturated power.

But S Parameters are a small signal test, to get any meaningful data (and eliminate the gain expansion), we need to bias the transistor Class A to get good S parameters.

Regarding Vgg for stage 2 the data is correct, please see datasheet. 

ErikaC_0-1657739067615.png

Regards.

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