Flash Data Retention vs. Endurance Cycles

[Ensaf]

Hello Team,

I am seeking clarification regarding the Flash reliability specifications detailed in Table 40 of the NXPKW45 datasheet.

Our application has a strict requirement for a 15-year minimum lifetime. We are currently utilizing the last 256 KB of the flash main memory, which, according to Note 3, is rated for a higher endurance of 100k cycles.

Based on the "Min" values provided in the table, we have observed an inverse relationship between endurance cycles and data retention:

• At 100k cycles (Tnvmretp100kTnvmretp100k​ Minimum retention is 5 years.
• At 10k cycles (tnvmretp10ktnvmretp10k​ Minimum retention is 10 years.
• At 1k cycles (Tnvmretp1kTnvmretp1k​ Minimum retention is 20 years.

Given our 15-year retention requirement, we have the following concerns:

1. Cycle Limit for 15-Year Retention: To guarantee a 15-year data retention period, what is the maximum number of program/erase cycles allowed per sector?
2. High-Endurance Block Impact: Does the fact that we are using the "last 256 KB" block (specified for 100k cycles) change the retention behavior compared to the standard flash sectors, or do the same retention-to-cycle ratios apply?

Please provide further illustration or documentation to help us align our usage profile with the 15-year reliability target. 

[Alexandre_Moulinet]

Hi @Ensaf,

The KW45 Reference Manual is detailing what is the memory Endurance:

And we have the footnote 2 defining that Sector cycling endurance represents the number of Program/Erase cycles on a single sector at -40 °C ≤ Tj ≤ 125 °C:

Therefore, a cycle represents an Erase operation, followed by a program operation.

1 cycle = erase the target flash area once, then program it again once.

This means your understanding is correct and this provide confirmation to your second point: 2. Definition of a "Cycle"

For the first point 1. Example Confirmation, the example you present is valid.

But there is one element you misunderstood.

18 cycles/day was the answer of one part of the equation you need to satisfy to reach 15 years of data retention and operation.

This is the answer to the cycle endurance but NOT to the data retention!

For the data retention, below is again the table showing the values:

Time Range	Allowed Cycles in Period	Avg Cycles / Year	Avg Cycles / Day
0 → 5 yrs	0 → 1k	≤ 200 / year	~0.55 / day
5 → 10 yrs	1k → 10k	≤ 1.8k / year	~5 / day
10 → 15 yrs	10k → 100k	≤ 18k / year	~50 / day

These numbers are more restrictive than the cycle endurance number. Therefore, you better comply with these numbers than the cycle endurance one.

Ideally, you must perform ≤ 200 / year cycles to ensure the data retention over 15 years.

But thanksfully, with your given example, we satisfy this requirement as well:

• Wear Leveling: If we use 2 sectors (16KB total), we would perform one erase & one program on each sector approximately every 42 days.

• 365 [days in a year] / 42 days [one P/E cycle in your example] = ~8,69 P/E cycles per year < recommended 200 cycles per year

This is exemple is within the guaranteed limits, your understanding is correct

Please let me know if you need additional details or if any points require clarification.

Regards,
Alex

[Alexandre_Moulinet]

Customer reply

Thank you for the detailed breakdown. To consolidate my understanding, I would like to confirm the following example and definition:

1. Example Confirmation:

 If we implement a counter that increments every hour (24 writes per day) with a payload of 16 bytes per write:

• Capacity: A single 8KB sector can hold 512 writes (8192/16) before it is full.
• Duration: At 24 writes/day, it takes about 21 days to fill one sector.
• Cycle Usage: After 21 days, we must perform an Erase to clear the sector. This counts as one (1) P/E cycle.
• Wear Leveling: If we use 2 sectors (16KB total), we would perform one erase on each sector approximately every 42 days.

Based on your previous email mentioning a limit of 18 cycles per day for 15 years, this specific use case (1 erase every 21 days) is well within the guaranteed limits. Is this understanding correct?

2. Definition of a "Cycle": Could you also confirm that "18 program/erase cycles" refers to 18 full cycles (where 1 cycle = 1 Erase + the subsequent Programming of that sector)?

I understand that a 'cycle' is only consumed when I am forced to Erase a sector back to 0xFFFFFFFF after it has been filled with Program operations. Therefore, 512 writes of 16-bytes each only consume a single P/E cycle once the sector is finally erased. Is this correct?

Best Regards,

----------------------------------------------------------------------

Ensaf Atef

[Alexandre_Moulinet]

Hi @Ensaf,

I provide information here as well for consistancy.

I think there is no conflicting information, but misinterpretation of the data provided in the datasheet and by NXP engineers.

So let’s restart all together here

First of all, I like the schema you have shared here:

From NXP DS, this is exactly what data tells us

There is another element to consider on the data provided in the DS.

1. On all the flash sector except the last 256kB one, the minimum guaranteed endurance is 10K cycles.
2. On the last flash 256kB sector, the minimum guaranteed endurance is 100K cycles

This is an important information to guide you to use the last 256kB flash sector to store non-volatile data.

Now, from your schema, you have drowned the Valeo’s expectations.

You want 15 years of data retention with data integrity.

What really counts here is the following:

1. How many cycles your system can do per year/per month/per day before reaching 100K cycles in 15 years?
2. How many cycles your system can do per year/per month/per day to respect the data retention of 15 years if the keyfob/car anchor stops working?

To provide the answer to question 1:

• 100K cycles = 15 years (that’s your target)
• X K cycles for 1 year?
• X = 100K / 15 = 6.666K cycles/year
• X = 6666K cycles / 12 = 555 cycles/month
• X = 555 cycles / 31 = 17.92 cycles/day

If you perform less than ~18 Program/Erase cycle per day, you will guarantee the data integrity for 15 years, located in the last 256kB of Flash.

To provide the answer to question 2: Let’s take the 6,666K cycles/year obtained above as an example.

1. Year 1: If 6,6666K cycles is performed over the year and the system stops, the minimum the datasheet can guarantee for data retention à 6,666K < 10K = 10 years + 1 year of operation = 11 years. This doesn’t satisfy the 15-years target.
2. Year 2: If 6,666K cycles * 2 = 13,332K cycles is performed over the 2 past years and the system stops, the minimum the datasheet can guarantee for data retention à 13,332K < 100K = 5 years + 2 year of operation = 7 years. This doesn’t satisfy the 15-years target.

We clearly see the data retention as an important factor for the product lifetime.

Key principle

At any stopping point: Operation time + retention(min @ cycles) ≥ 15 years

Recommended cumulative cycle limits

Product Age (years)	Max Cumulative Cycles	Min Retention @ this level	Guaranteed Total Lifetime	Status
0 → 5	≤ 1k cycles	≥ 20 years	≥ 20 + t ≥ 25 years	Safe margin
5 → 10	≤ 10k cycles	≥ 10 years	≥ 10 + t ≥ 15–20 years	Safe
10 → 15	≤ 100k cycles	≥ 5 years	≥ 5 + t ≥ 15–20 years	Safe
> 15	Not applicable	Not required	Requirement already met	—

This gives us theoretical cycles/year as below:

Time Range	Allowed Cycles in Period	Avg Cycles / Year	Avg Cycles / Day
0 → 5 yrs	0 → 1k	≤ 200 / year	~0.55 / day
5 → 10 yrs	1k → 10k	≤ 1.8k / year	~5 / day
10 → 15 yrs	10k → 100k	≤ 18k / year	~50 / day

This is strictly what the KW45 datasheet can guarantee at minimum.

You can assume we have a linear degradation of the data retention per cycles between:

• 1K (20 years data retention) à 10K (10 years data retention): each 1K cycle removes 1 year of data retention
• 10K (10 years data retention) à 100K (5 years data retention): each 10K cycles removes 0.5 years of data retention

But this is just assumptions and NXP cannot guarantee this data. Taking this assumption into account would make the number of cycles/year more flexible.

This is why the above tables are what NXP can guarantee for 15 years operation.

For robustness in your design:

• Implement:
• Wear-leveling / EEPROM emulation : you can check the AN14746: EEPROM Emulation for the KW45B41Z and K32W148
• Cycle counters per sector
• Optional refresh mechanism (re-writing data periodically to reset retention clock)
• Highlight:
• The last 256kB block only improves endurance (100k)
• It does NOT improve retention curve (same retention vs cycles relationship applies)

I hope this is now clear to you

Please let me know if you need additional details or if any points require clarification.

Regards,
Alex

[Alexandre_Moulinet]

Hi @Ensaf,

You don't get this right.

If you want to achieve write up to 15 years to the flash memory, you need to perform <5K writes (cycles) on the memory sector you are using.

The endurance limit (100K cycles for the last 256kB sector) is representing how many cycles we guarantee keeping data integrity. This doesn't mean that you can achieve up to 15 years with 100K cycles!

Again, below are the minimum we guarantee across all the flash sectors:

• Up to 20 years: 1K cycles
• Up to 15 years: 5K cycles
• Up to 10 years: 10K cycles
• Up to 5 years: 100K cycles

What you should ask yourself is the following:

How many writes the system performs in 1 year?

Let's say the system writes 1K cycles per year.

It means:

1. After year 1, the system gets 20 years of data retention guaranteed at minimum.
2. After year 5, the system gets 15 years of data retention guaranteed at minimum.
3. After year 10, the system gets 10 years of data retention guaranteed at minimum.
4. After year 15, the system gets 10.5 years of data retention guaranteed at minimum.
5. After year 20, the system gets 9 years of data retention guaranteed at minimum.

I hope this example better explains what you should consider and how to determine the data retention.

Regards,
Alex

[Ensaf]

Just to Consolidate ... we can continue to write up to 15 years to the flash memory as long as we have physical space and have not yet reached the maximum endurance limit (100k cycles for that specific block) ... 

[Alexandre_Moulinet]

Hi @Ensaf,

It looks like you believe the last 256kB sector is having different figures in terms of data retention after up to X K cycles.
But it is not the case.

Below is what the table is telling us:

• What is the data retention time for the last 256KB block after 100K cycles?

From the table, the minimum data retention time for the last 256kB block after 100K cycles is 5 years. It is the same as the rest of the flash memory.

• can the 256KB block sustain more cycles while still guaranteeing 15-year retention?

The last 256kB block, as well as the rest of the flash memory, need to have a number of cycle is <5k to guarantee 15-year retention.

I hope this is more clear to you now.

Regards,
Alex

[wenbo_qi]

Hello @Ensaf 

The Data retention time given here is the retention time AFTER the indicated number of cycles.

For example, the given number of Tnvmretp100k is the data retention time after 100k cycles, which is at minimum 5 years. If you reduce the number of cycles to 10k, the data retention time becomes >10 years. In general, the expected retention time decreases if more cycles are done.

So the required 15 years can be reached if the number of cycle is <5k.

For the last 256KB block, I believe that it's the same than other blocks.

Thanks and best regards,

Wenbo

cc: @Alexandre_Moulinet 

[Ensaf]

But in Table 40, the last 256KB block (N_nvmcyc256k) is rated for 100K cycles minimum. However, there is no dedicated data retention specification for this block after high cycle counts. Could you please confirm:

• What is the data retention time for the last 256KB block after 100K cycles?
• can the 256KB block sustain more cycles while still guaranteeing 15-year retention?