Clarification on Pin Multiplexing Differences Between CM7 and CM4 on i.MX RT1176

[meetbhatt2113]

Hello everyone,

I am working with the i.MX RT1176 using MCUXpresso SDK and developing applications for both the CM7 (primary) and CM4 (secondary) cores.

I have an application that runs correctly on the CM7 core, and I replicated the same application logic on the CM4 core. The CM4 project builds successfully without errors. However, I noticed a significant difference in the generated pin_mux.c files for the two cores.

In the CM7 project, the pin_mux.c file configures multiple peripherals such as ENET, LPUART1 and LPUART2, CAN, I2C, and several GPIOs. In contrast, the CM4 pin_mux.c file only configures LPUART1 and a limited number of GPIO pins. Peripherals like LPUART2, ENET, CAN, and I2C are completely absent in the CM4 pin configuration.

Is this difference expected on the RT1176 due to core ownership, XRDC restrictions, or the way MCUXpresso generates projects for dual-core devices?

What is the recommended approach when moving functionality from CM7 to CM4? Should pin multiplexing always be initialized on the CM7 core only, or is it valid for CM4 to configure its own pin multiplexing if clocks and XRDC permissions are set appropriately?

Any guidance or best practices from NXP or experienced users would be greatly appreciated.

Thank you.

[mayliu1]

Hi @meetbhatt2113 ,

Thank you so much for your interest in our products and for using our community.

Q1: Is this difference expected on the RT1176 due to core ownership, XRDC restrictions, or the way MCUXpresso generates projects for dual-core devices?

A1: I suggest you can refer to IMXRT1170RM chapter3 Memory Maps, especially 3.2 System memory map (CM7) and 3.3 System memory map (CM4).

You can find out that multiple peripherals can run in CM4.

Q2: What is the recommended approach when moving functionality from CM7 to CM4? Should pin multiplexing always be initialized on the CM7 core only, or is it valid for CM4 to configure its own pin multiplexing if clocks and XRDC permissions are set appropriately?

A2: There are many SDK demos for CM4 for you to refer.       

Pin multiplexing can be initialized on the CM7 core, but synchronization with the CM4 core must be carefully managed. Alternatively, CM4 can configure its own pin multiplexing if required.

The choice depends on your project  requirement.

Q3:  Any guidance or best practices from NXP or experienced users would be greatly appreciated.

A3:  I suggest you can refer to  the following application notes.

https://www.nxp.com/docs/en/application-note/AN13264.pdf

https://www.nxp.com/docs/en/application-note/AN13114.pdf

Wish it helps you.
If you still have question about it, please kindly let me know. 

Best Regards
MayLiu