UWB MAC Custom Session

[tomzzzz]

Prerequisites:
NCJ29D5 both ends now use AIO's SDK, and the functions and functions related to Customized Session have been enabled in the APP code, the low-power mode has been disabled, and nothing else has been modified.
Problematic:
1. Now the parameters configured by Responder RCM_RX_TIMEOUT configurable time in the NXP_UCI_CCC_Specification description can be configured from 50us-40000us, but now the configuration parameters cannot take effect from the current waveform, and the configuration is the same as 40000us and 20000us, resulting in the RX on time is too short.
Do other parameters need to be configured together to take effect?

2.The ranging can be started normally, but the ranging status code received on the initiator side is shown as follows
0x2: Transaction expired
The ranging status code received in Responder is shown below
0xF: Ranging Control Message lost (Not available for the controller)

The following is the configuration of the SET_APP_CONFIG_CMD parameters of the initiator

        UCI_SPI_DATA_TX_Buffer[0] = 0x21;

UCI_SPI_DATA_TX_Buffer[1] = 0x03;

UCI_SPI_DATA_TX_Buffer[2] = 0x00;

#if in_resp

        GPIO_PinWrite(GPIOC,2u,1u);

UCI_SPI_DATA_TX_Buffer[3] = 0x31;//0x24,0x21,0x28,0x2B

        UCI_SPI_DATA_TX_Buffer[4] = 0x03;

UCI_SPI_DATA_TX_Buffer[5] = 0x00;

UCI_SPI_DATA_TX_Buffer[6] = 0x00;

UCI_SPI_DATA_TX_Buffer[7] = 0x00;

UCI_SPI_DATA_TX_Buffer[8] = 0x0C;//0x0A,0x0B,0x09,0x08

UCI_SPI_DATA_TX_Buffer[9] = 0x04;//CHANNEL ID

UCI_SPI_DATA_TX_Buffer[10] = 0x01;

UCI_SPI_DATA_TX_Buffer[11] = 0x09;

        UCI_SPI_DATA_TX_Buffer[12] = 0x05;//ANCHORS

UCI_SPI_DATA_TX_Buffer[13] = 0x01;

UCI_SPI_DATA_TX_Buffer[14] = 0x01;

      UCI_SPI_DATA_TX_Buffer[15] = 0x08;//SLOT_LENGTH

UCI_SPI_DATA_TX_Buffer[16] = 0x02;

        UCI_SPI_DATA_TX_Buffer[17] = 0x60;//0x60,0x10,0xB0,0xC0

UCI_SPI_DATA_TX_Buffer[18] = 0x09;//0x09,0x0E,0x04,0x12

UCI_SPI_DATA_TX_Buffer[19] = 0x09;//RANGING_INTERVAL

        UCI_SPI_DATA_TX_Buffer[20] = 0x04;

UCI_SPI_DATA_TX_Buffer[21] = 0x18;//0x60,0x12,0x10,0x18,0x14

        UCI_SPI_DATA_TX_Buffer[22] = 0x00;

UCI_SPI_DATA_TX_Buffer[23] = 0x00;

UCI_SPI_DATA_TX_Buffer[24] = 0x00;

        UCI_SPI_DATA_TX_Buffer[25] = 0x11;//0x01 Device Role Initiator,0x00 Responder

UCI_SPI_DATA_TX_Buffer[26] = 0x01;

UCI_SPI_DATA_TX_Buffer[27] = 0x01;//0x00,0x01

        UCI_SPI_DATA_TX_Buffer[28] = 0xF2;//TX_POWER_ID

        UCI_SPI_DATA_TX_Buffer[29] = 0x01;

UCI_SPI_DATA_TX_Buffer[30] = 0x00;

        UCI_SPI_DATA_TX_Buffer[31] = 0x1B;//SLOTS_PER_RR

        UCI_SPI_DATA_TX_Buffer[32] = 0x01;

UCI_SPI_DATA_TX_Buffer[33] = 0x06; 

        UCI_SPI_DATA_TX_Buffer[34] = 0x02;//CUSTOM SESSION ONLY SUPPORT Static STS 0X00

        UCI_SPI_DATA_TX_Buffer[35] = 0x01;

UCI_SPI_DATA_TX_Buffer[36] = 0x00;

        UCI_SPI_DATA_TX_Buffer[37] = 0xE3;//RX_START_MARGIN

        UCI_SPI_DATA_TX_Buffer[38] = 0x01;

        UCI_SPI_DATA_TX_Buffer[39] = 0XFF;

        UCI_SPI_DATA_TX_Buffer[40] = 0xE4;//RX_TIMEOUT

        UCI_SPI_DATA_TX_Buffer[41] = 0x02;

        UCI_SPI_DATA_TX_Buffer[42] = 0xF4;

        UCI_SPI_DATA_TX_Buffer[43] = 0x01;

        UCI_SPI_DATA_TX_Buffer[44] = 0xFB;//RADIO_CFG_IDXS

        UCI_SPI_DATA_TX_Buffer[45] = 0x04;

        UCI_SPI_DATA_TX_Buffer[46] = 0x00;

        UCI_SPI_DATA_TX_Buffer[47] = 0x01;

        UCI_SPI_DATA_TX_Buffer[48] = 0x10;

        UCI_SPI_DATA_TX_Buffer[49] = 0x11;

        UCI_SPI_DATA_TX_Buffer[50] = 0x0C;

        UCI_SPI_DATA_TX_Buffer[51] = 0x01;

        UCI_SPI_DATA_TX_Buffer[52] = 0x03;

Below is the configuration of the SET_APP_CONFIG_CMD related parameters of Responder:

UCI_SPI_DATA_TX_Buffer[3] = 0x46;//0x24,0x21,0x28,0x2B

UCI_SPI_DATA_TX_Buffer[4] = 0x03;

UCI_SPI_DATA_TX_Buffer[5] = 0x00;

UCI_SPI_DATA_TX_Buffer[6] = 0x00;

UCI_SPI_DATA_TX_Buffer[7] = 0x00;

UCI_SPI_DATA_TX_Buffer[8] = 0x11;//0x0A,0x0B,0x09,0x08

UCI_SPI_DATA_TX_Buffer[9] = 0x04;//CHANNEL ID

UCI_SPI_DATA_TX_Buffer[10] = 0x01;

UCI_SPI_DATA_TX_Buffer[11] = 0x09;

 UCI_SPI_DATA_TX_Buffer[12] = 0x05;//ANCHORS

UCI_SPI_DATA_TX_Buffer[13] = 0x01;

UCI_SPI_DATA_TX_Buffer[14] = 0x01;

UCI_SPI_DATA_TX_Buffer[15] = 0x08;// SLOT_LENGTH

UCI_SPI_DATA_TX_Buffer[16] = 0x02;

UCI_SPI_DATA_TX_Buffer[17] = 0x60;//0x60,0x10,0xB0,0xC0

UCI_SPI_DATA_TX_Buffer[18] = 0x09;//0x09,0x0E,0x04,0x12

UCI_SPI_DATA_TX_Buffer[19] = 0x09;//RANGING_INTERVAL

UCI_SPI_DATA_TX_Buffer[20] = 0x04;

UCI_SPI_DATA_TX_Buffer[21] = 0x18;//0x60,0x12,0x10,0x18,0x14

UCI_SPI_DATA_TX_Buffer[22] = 0x00;

UCI_SPI_DATA_TX_Buffer[23] = 0x00;

UCI_SPI_DATA_TX_Buffer[24] = 0x00;

UCI_SPI_DATA_TX_Buffer[25] = 0x11;//0x01 Device Role Initiator,0x00 Responder

UCI_SPI_DATA_TX_Buffer[26] = 0x01;

UCI_SPI_DATA_TX_Buffer[27] = 0x00;//0x00,0x01

UCI_SPI_DATA_TX_Buffer[28] = 0xF2;//TX_POWER_ID

UCI_SPI_DATA_TX_Buffer[29] = 0x01;

UCI_SPI_DATA_TX_Buffer[30] = 0x00;

UCI_SPI_DATA_TX_Buffer[31] = 0x1B;//SLOTS_PER_RR

UCI_SPI_DATA_TX_Buffer[32] = 0x01;

UCI_SPI_DATA_TX_Buffer[33] = 0x06; 

UCI_SPI_DATA_TX_Buffer[34] = 0x02;//CUSTOM SESSION ONLY SUPPORT Static STS 0X00

UCI_SPI_DATA_TX_Buffer[35] = 0x01;

UCI_SPI_DATA_TX_Buffer[36] = 0x00;

 UCI_SPI_DATA_TX_Buffer[37] = 0x1E;//RESPONDER_SLOT_INDEX

 UCI_SPI_DATA_TX_Buffer[38] = 0x01;

UCI_SPI_DATA_TX_Buffer[39] = 0x00;

        UCI_SPI_DATA_TX_Buffer[40] = 0xEA;// RCM_RX_MARGIN_TIME

        UCI_SPI_DATA_TX_Buffer[41] = 0x03;

        UCI_SPI_DATA_TX_Buffer[42] = 0x01;

        UCI_SPI_DATA_TX_Buffer[43] = 0xE8;//0x40,0xE8,0x20

        UCI_SPI_DATA_TX_Buffer[44] = 0x03;//0x9C,0x03,0x4E

        UCI_SPI_DATA_TX_Buffer[45] = 0xEB;//RCM_RX_TIMEOUT

        UCI_SPI_DATA_TX_Buffer[46] = 0x03;

        UCI_SPI_DATA_TX_Buffer[47] = 0x01;

        UCI_SPI_DATA_TX_Buffer[48] = 0x40;//0x20

        UCI_SPI_DATA_TX_Buffer[49] = 0x9C;//0x4E

        UCI_SPI_DATA_TX_Buffer[50] = 0xE5;//ADAPTED_RANGING_INDEX (*)

        UCI_SPI_DATA_TX_Buffer[51] = 0x02;

        UCI_SPI_DATA_TX_Buffer[52] = 0xFF;

        UCI_SPI_DATA_TX_Buffer[53] = 0xFF;

        UCI_SPI_DATA_TX_Buffer[54] = 0xFB;//RADIO_CFG_IDXS

        UCI_SPI_DATA_TX_Buffer[55] = 0x04;

        UCI_SPI_DATA_TX_Buffer[56] = 0x00;

        UCI_SPI_DATA_TX_Buffer[57] = 0x01;

        UCI_SPI_DATA_TX_Buffer[58] = 0x10;

        UCI_SPI_DATA_TX_Buffer[59] = 0x11;

        UCI_SPI_DATA_TX_Buffer[60] = 0xE3;//RX_START_MARGIN

        UCI_SPI_DATA_TX_Buffer[61] = 0x01;

        UCI_SPI_DATA_TX_Buffer[62] = 0XFF;

        UCI_SPI_DATA_TX_Buffer[63] = 0xE4;//RX_TIMEOUT

        UCI_SPI_DATA_TX_Buffer[64] = 0x02;

        UCI_SPI_DATA_TX_Buffer[65] = 0xF4;

        UCI_SPI_DATA_TX_Buffer[66] = 0x01;

        UCI_SPI_DATA_TX_Buffer[67] = 0xF1;//RR_RETRY_THR

        UCI_SPI_DATA_TX_Buffer[68] = 0x02;

        UCI_SPI_DATA_TX_Buffer[69] = 0x00;

        UCI_SPI_DATA_TX_Buffer[70] = 0x64;

        UCI_SPI_DATA_TX_Buffer[71] = 0x0C;

        UCI_SPI_DATA_TX_Buffer[72] = 0x01;

        UCI_SPI_DATA_TX_Buffer[73] = 0x03;

[Ricardo_Zamora]

Hello,

Sorry for the inconvenience this might cause you but as the information of these products it's under NDA (Non-Disclosure Agreement) the information it's not public, this is not a secure channel to share any information of this device and I do not have the data as well for the same reason.

For more information about the chips and buying process, could you please contact one of our distributors available in the Distributor Network|NXP? They can not only help you with the NDA process, but also help you check if you can get documentation and the information they can offer you.

Regards,

Ricardo