Hi Paritosh,
In the Analyzing HardFaults on Cortex-M CPU article mention the sources for each fault:
Bus Fault: detects memory access errors on instruction fetch, data read/write, interrupt vector fetch, and register stacking (save/restore) on interrupt (entry/ exit).
Memory Management Fault: detects memory access violations to regions that are defined in the Memory Management Unit (MPU); for example code execution from a memory region with read/write access only.
Usage Fault: detects execution of undefined instructions, unaligned memory access for load/store multiple. When enabled, divide-by-zero and other unaligned memory accesses are also detected.
Hard Fault: is caused by Bus Fault, Memory Management Fault, or Usage Fault if their handler cannot be executed.
For more information I will suggest to check the following link.
Best Regards,
Alexis Andalon
