I am using the SCT timer 0 on the LPC1549. The goal is to advance through multiple states, each time match 0 rolls the counter over, the state increments. Match 1, 2 , and 3 trigger events 1,2, and 3 respectively in states 1, 2, and 3. When event 3 happens in state 3, the state is advanced back to state 0.
For each event, SCT0 output 3 is set or cleared.
For each event 1, 2, and 3, the output should be cleared. For event 0, the output should be set.
The problem is, each event works individually, but not together. I need the the output to clear for different lengths in each state.
This code below produces an output of 28ms high, 2ms low. But the expectation for output pin would be:
State 0: Set high ------> State 1
State 1: 2ms high, 8ms low,
State 2: 5ms high, 5ms low,
State 3: 8ms high, 2ms low ----> State 0,
Can someone tell me where I'm misunderstanding this?
LPC_SCT0->CONFIG = (0x1 << 0 | 1 << 17); // 32-bit timer, auto limit at match 0
uint32_t period = 720000;
LPC_SCT0->MATCHREL[0].U = period - 1; // match 0 will set at 1kHz
LPC_SCT0->MATCHREL[1].U = period/5;
LPC_SCT0->MATCHREL[2].U = period/2;
LPC_SCT0->MATCHREL[3].U = (period/5)*4;
LPC_SCT0->EVENT[0].STATE = 0xffffffff; // Event 0 happens in all states
LPC_SCT0->EVENT[0].CTRL = (0 << 0) | (1 << 12) | (0 << 14) | (1 << 15) ; // Advance by one
LPC_SCT0->EVENT[1].STATE = 1ul<<1;//1ul<<1; // event 1 happens in state 1
LPC_SCT0->EVENT[1].CTRL = (1 << 0) | (1 << 12 );
LPC_SCT0->EVENT[2].STATE = 1ul<<2; // event 2 happens in state 2
LPC_SCT0->EVENT[2].CTRL = (2 << 0) | (1 << 12);
LPC_SCT0->EVENT[3].STATE = 1ul<<3; // event 3 happens in state 3
LPC_SCT0->EVENT[3].CTRL = (3 << 0) | (1 << 12) | (1 << 14) | (0 << 15); //Advance to state 0
LPC_SCT0->OUT[3].SET = (1 << 0); // event 0 will set SCTx_OUT0
LPC_SCT0->LIMIT_L = (1 << 0); // event 0 will reset counter
LPC_SCT0->OUT[3].CLR = (1 << 1); // event 1 will clear SCTx_OUT0
LPC_SCT0->OUT[3].CLR = (1 << 2); // event 2 will clear SCTx_OUT0
LPC_SCT0->OUT[3].CLR = (1 << 3); // event 3 will clear SCTx_OUT0
