TDA8035 injecting 1.7kHz noise into VCC at 3.3V - how to correct?

[hamasaki]

Hi there, it doesn't seem there's a dedicated forum for smartcards but there was another TDA8035 post in here before, so I'm putting it out here.

Until now we've used TDA8024 for production but our vendor told that it's getting EOL'd so we were suggested a replacement with TDA8035. So in this redesign, we got a TDA8035 connected to STM32F031 MCU for smartcard processing. Schematic is attached, it's basically following the reference design as closely as possible. The card in question is running at 5V.

 However, when checking with the scope, ST3V3 line has the above switching noise pattern. Per the AN10997 there are 0603-sized 220nF caps near the VCC (pin22) and near the socket vcc pin.

Is there anything that can be done to remedy this issue? The switching noise from TDA is actually getting injected back into the 3.3V rail (ST3V3), and in general it doesn't look very nice. I understand that there is going to be noise since this is a switched capacitor dc/dc converter, but should we expect this to happen? For what it's worth, the 5V output from VCC (pin22) looks clean, at least, no repeating 1.7kHz pattern like above.

The noise stops when card is removed (to be expected, as the card voltage regulator shuts down).

EDIT: I'm aware VREG is tied to 3V3 on the schematic, this has been since fixed (VREG -> 0.1uF -> GND) however the noise at 3V3 is not caused by this.

Second EDIT: During smartcard comms, the noise frequency increases:

 The comms baudrate is around 22kbaud, this doesn't seem to be any harmonic of that.

Card clock is 4MHz (at card connector). 8MHz is fed into TDA8035, which is then divided by /2 with CLK1/CLK2 lines.

[hamasaki]

Hi, Already did that (soldered 0805 22uF and 10uF) on top of ST3V3 and no difference.

This is noise coming from the DC/DC regulator inside the IC and its getting injected into the external power rails as well

[weidong_sun]

The frequency of 1.7KHz is too low. If a larger capacitor is used, the package size will be large and it is difficult to solder it on the board. However, we can also consider connecting another bead in series with the ST3V3 power rail.

[hamasaki]

Yeah, we already tried all the common sense solutions to the problem.

My question was, is IC supposed to inject this kind of noise into it's own power rail?

For example, could same point be measured on say CAKE8035 board and compare?

Other than VREG correction on schematic, is there anything else obviously missing that would cause this performance? Layout-wise, after looking at Cake8035, I don't think there are any issues with our current layout - if the cake works on 2L with all those testpoints etc, I don't think it would be an issue on our current 4L board.

(speaking of cake8035, is design data (sch, layout) available for it?  the images in AN10999 are barely readable and contain tons of artifacts)

[weidong_sun]

The most important thing is to confirm how this 1.7KHz noise enters the board, not to discuss whether the circuit has errors.

So, can you be sure that this noise enters the board via the CON1 connector?

weidong

[hamasaki]

Noise is generated by TDA8035. When card is not present (DC/DC is off) 3V3 rail is clean. As soon as card is inserted and CARD_VCC is present, noise is appeared.

Also, when card is running at 3V mode (we tried with a Class AB card), the noise is not present (CARD_VCC is 3.0V)

This is clearly caused by the 3.3V -> 5V step-up inside TDA8035

[weidong_sun]

I checked and compared your schematic with AN10999:

The VREG pin is 1.8V voltage output, the correct connection is to connect a 100nF capacitor to GND instead of connecting it to 3.3V.

[hamasaki]

As I said In original post, this is not the problem.

Other suggestions?
How about the measurements I mentioned on a cake8035 board, does anyone at NXP actually have one of these on hand to test with?!

[weidong_sun]

Hi,

 Replied you in case 00334494, and attached document in the case.

check it, please!

Have a nice day!

B.R,

weidong

[hamasaki]

> EDIT: I'm aware VREG is tied to 3V3 on the schematic, this has been since fixed (VREG -> 0.1uF -> GND) however the noise at 3V3 is not caused by this.

Yes, this has been mentioned in the original post. The PCB reflects the corrected schematic.

[weidong_sun]

Hello hamasaki ,

    You can add a 10uF capacitor to the ST3V3 power rail, and then measure the power waveform with an oscilloscope to see if the 1.7Hz pulse is filtered out. 

  Try it , please!

have a  nice day!

B,R,

weidong