PN7362, PVDD_IN on timing

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PN7362, PVDD_IN on timing

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jakehong
NXP Employee
NXP Employee

Dear. 

 

Customer is using PN7362 with 1.8V, digital IO level.  So we are supplying 1.8V externally on PVDD_IN. 

Because, 1.8V is coming from other block, we have problem to control timing of supplying 1.8V to PVDD_IN of PN7362. 

So, sometimes, PVDD_IN on time is much slower than VBUS and VUP_TX. 

Could you check whether it's ok or not?

And if it's ok, what is the allowed delay time between from VBUS on to PVDD_IN on?

 

Thank you. 

 

Best regards,

Jake Hong. 

 

Thank you. 

 

Best regards,

Jake Hong. 

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