Dynamic Lock Bytes for NT3H2111 is off by 4 bytes?

[yanqil]

The datasheet for The NT3H2111 shows the Dynamic lock bytes as starting at offset 4 on page 0x38.  However, in practice, setting bytes 4, 5, and 6 did not lock pages 16 and above.  Instead, writing to bytes 8, 9, and 10 did the trick.  I am wondering if this was a mistake in the datasheet or did we get a batch of chips that has the incorrect address for the dynamic lock bytes?

[KaiLi]

Hello @yanqil 

Dynamic Lock Bytes should be a bit difference between 1K version and 2K. What you used should be 2k version, so bytes8,9 and 10 are Dynamic Lock Bytes. But for 1K version, bytes4,5 and 6 are Dynamic Lock Bytes. Please check the below screenshot for the details.