i understand that to perform multiple channel ADC simultaneous read it has to be done through the pbd back to back trigger mechanism. I wonder if this has been implemented in the mbdt s32k1xx ? i see an example but it is for a single channel..
The ADC conversion triggered by the PWM via PDB is possible in MBDT via the configuration blocks of all the mentioned peripherals. I have attached below the main settings, highlighted in the configuration blocks, just as the trigger signal occurs in this chain. First, the initialization trigger for the FTM needs to be enabled. In the PDB block, the trigger of the configured FTM Timer instanced needs to be selected, like below, the FTM3 Initialize Trigger. Finally, here, in the ADC_Config block, the control needs to be grated to the PDB peripheral.
We do provide an example, called ftm_pdb_adc_chaining_s32k14x.mdl and it is delivered with the toolbox. Here, the FTM3 initialization trigger is used for both PDB0 and PDB1, to trigger each PDB instance a channel of the ADC0 and ADC1 respectively, basically converting two ADCs at the same time. The results are read via the PDB ISR, where the ADC block is used to read the values.
Another way of reading the conversion results for the ADC is performed via the ADC interrupt and this method is used inside the Motor Control examples, also delivered with the toolboxes.
What we don't have no in the MBDT blocks is the configuration block for reading data via DMA. If you are interested in particular to read data via DMA we can add the missing part via the Custom code.
Please let me know if you have further questions!
thank you Marius for the explanations. yes i'm aware of the example. a follow up question is to read the multiple ADC channels within the same module in one operation. for example, i would need to read the three currents and one voltage simultaneously to before performing the 3-2 transformation for the foc so that the samples of the currents and voltage are from the same moment. if in the hardware i wire Ia, Ib, Ic and Vbus to ADC0_SE0, ADC0_SE1, ADC0_SE2, ADC0_SE3, how the blocks in the MBDT should be arranged?