SPI extra clock pulse generation issue in MBDT

[Vijay98]

Hello NXP team,

Currently we are working on SPI communication in MBDT Version 1.5.

And we are facing one issue: that we are getting one extra pulse in the serial clock pin before chip select goes low.

Vijay98_0-1750502016170.jpeg

We can not able to decode this issue.

With this, we are facing challenges in reading SPI commands fro another ic.

I have added the configuration photos which we done.

Vijay98_1-1750502610150.pngVijay98_2-1750502652455.pngVijay98_3-1750502670527.pngVijay98_4-1750502686354.pngVijay98_5-1750502705125.png

Kindly help us to resolve this issue ASAP.

@PetrS 

@stefanvlad 

@Irina_Costachescu 

Thanks & Regards,

Vijay