TWR-K65F180 SDRAM Clock

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TWR-K65F180 SDRAM Clock

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Mike_d
Contributor IV

Hello,

I was wondering if there was a reason the SIM_CLKDIV1/OUTDIV3 is set for 24MHz and not 60MHz.

Regards,

-Mike

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danielchen
NXP TechSupport
NXP TechSupport

Hi Mike:

The SDRAM uses CLKOUT as SDRAM clock, when MCU power up, the MCG is not initialized, the core/system and bus clock use default clock. For K65, the default bus clock is about 24M, but you can configure it as 60Mhz

Regards

Daniel

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