A real need of uncached memory is when the memory is used by multiple crossbar switch master ports. Typical example would be with DMA, for example when there is a valid data in the CPU cache and DMA moves some different data to the physical memory to that address (which is valid and sits in the cache). If we don't specifically invalidate the cache line after DMA has updated the data, CPU doesn't know about new data.
The souce code comment in MFS is referring to this bug (see MQX Release notes):
"TWR-MCF5418 demo web_hvac cannot browse webpages from USB - Problem with memory cache. Changed MFS_mem_alloc_system_zero function - replaced _mem_alloc_system_zero with _mem_alloc_system_zero_uncached."
and this is connected with another comment from release notes:
"user application buffers used by USB EHCI class drivers have to reside in un-cached memory space."
This is exactly the case, when MFS mounts on a USB Host MSD class on MCF54418, the physical data is moved between USB bus and memory by USB crossbar master. The same would apply to KHCI USB controller (USB-OTG master) but there only BDT memory is shared between CPU and USB-OTG (BDT section - see linker command files), and BDT is put into internal SRAM by MQX linker command files.
Thus, the requirement for uncached memory is driven by application scenario. In case the only master accessing your external memory will be the CPU (code bus or system bus for all load/store accesses), MFS won't need uncached memory, as all data will be in sync as seen by CPU via data cache. But if you plan to add another master between the CPU and the physical data (for example use DMA or USB to move data from source memory to destination memory) MFS would need uncached memory, or, alternatively, you can design your software with cache invalidate/flush sequences in appropriate places. That is, flush data cache after CPU store, and invalidate data cache after non-CPU master store.
By the way, it applies to Ethernet master on crossbar switch too, that is, Ethernet module buffers and buffers descriptors need to be in uncached memory. The "uncached" memory is not the same as "fast". They really mean two things, non-cacheable, due to multiple masters, and fast, to efficiently execute CPU random accesses to system memory. For the Ethernet, a memory for ethernet buffers and buffer descriptors has to be both fast and uncached, thus, it needs to be in the internal SRAM.
If you plan to use mem_extend() to increase the memory available in your system (I guess this is all about the memory allocator question) then please consider that the mem_extend() puts the extended memory pool to the beginning of the free memory pools. All subsequent mallocs (after mem_extend) would allocate memory from the extend memory, until it is consumed. Thus, my recommendation would be, during MQX system startup, allocate as much as possible into internal SRAM, like stacks for tasks, interrupt stack, ethernet buffers and buffer descriptors etc.) and call mem_extend() after these MQX components are allocated in the internal SRAM.