K60 CAN Message Buffer Structure

[robertin75]

Hello: On page 1345 from the document "K60 Sub-Family Reference Manual" section 48.3.56 there is no indication of what the bits in the ID fields are. According to the Bosch spec both the SRR and IDE bit fields are part of the CAN ID but this micro has them separated (or are they both included on the ID field? I don't know). Also on page 151 from the document Freescale MQX TM I/O Drivers Users Guide, the FLEXCAN_Tx_message() function does not mention what is the bit breakdown from parameter uint_32 format. Anyone knows where can I find more in-depth information about what is the bit breakdown from the ID field from the Message Buffer Structure? Thanks, Roberto ....

[PetrM · Accepted solution]

Hello,

SRR and IDE bits are separated in control register.

ID register bits 28-18 are to be set with standard ID bits 10-0 (most significant is highest).

ID register bits 28-0 are to be set with extended ID bits 28-0 (most significant is highest).

Parameter identifier of the function FLEXCAN_Tx_message() should always contain the ID bits in its lowest bits (starting from bit 0).

The best source is the source code and header files for FlexCAN peripheral.

Regards,

PetrM