skip instruction for ECC error

[michael_chien1]

Question: I have no idea VLE_INSTRUCTION for? how to get VLEV_INSTRUCTION value?

background:

In AN4648 document

there is an algorithm to decide skip 2 or 4 instruction for ECC error.

However, I got the other algorithm from other supplier as blow

the Major different is about VLE_INSTRUCTION.

So I would like to know what is VLE_INSTRUCTION for? how does it decide the skipping length of instruction?

Do you have comment for other supplier code for VLE decided?

By the way, our MCU is MPC5746C.

NPX algorithm:

if(VLE_INSTRUCTION)

{

        if((instruction & 0x9000) == 0x1000)

        {

                // first 4 bits have a value of 1,3,5,7

                return address +=4; //instruction was 32-bit

        }

        else

        {

                // first 4 bits have a value of 0,2,4,6,8,9,A,B,C,D,E (and F, but F is                reserved)

                return address +=2; //instruction was 16-bit

        }

}

the other supplier algorithm

opCode = (*instrAddress) & 0x90u;

if ((!((excDetails->syndrome & EXC_ESR_VLEMI) == 0)) || (opCode == 0x10))

{

        instrAddress += 4;

}

else

{

        instrAddress += 2;

}      

[davidtosenovjan]

Hi, other supplier also tests some syndrome, according shown mask it is ESR register, but this register is untouched during machine check exception that is only happening on MPC5744P with 2bit ECC error. But condition is ORed with testing of opcode, what is equivalent to C code above, so I guess it'll behave same way.

[michael_chien1]

to my point of view, the algorithm have different behavior.
In your algorithm VLE is to decide to skip or not. But in other supplier, it is to decide to skip 4 or 2.
that makes me confused.

I'm using supplier algorithm now and it jumps to null instruction address somehow.
that is why I asked this question and want to clarify where is the problem and how to fix it.

attachment is my debug capture for this issue for your reference.

[davidtosenovjan]

In case it is needed to return to program flow before exception occurred (i.e. after instruction that caused
the exception) then it is needed to increase exception returning address by length of instruction causing
an exception (in case BookE by 4, in case VLE by 2 or 4 according to instruction opcode).

This is done by both codes as I understand it.

[michael_chien1]

I'm using MPC5746C. In this case, are we able to remove VLE checking algorithm according to the description in section 6 core of AN4658, "The MPC5644A incorporates the e200z446n3 core while the MPC574xR incorporates an e200z425n3 core. With the exception of the SPE APU, and Book E instruction support, the two instruction sets are the same. No modifications to
compiler switches or options are required if using the Variable Length Encoded instruction set and not using SPE on the MPC5644A.
Hand coded SPE instructions will require modification (see Signal Processing Lite (LSP)), and any assembly code that contains Book E instructions (classic 32-bit Power Architecture) will need to be ported to the VLE instruction set for use on the e200z425n3 core"

like this

opCode = (*instrAddress) & 0x90u;

if(opCode == 0x10)
{
instrAddress += 4;
}
else
{
instrAddress += 2;
}

[davidtosenovjan]

Yes, this core only use VLE and so you may omit BookE checking.

[michael_chien1]

we are implementing MCSRR for NVM and Ram data crash handling for ECC error in MPC5746C.
In this case, VLE should not be impacted according to MPC5746 data sheet.
VLEMI is only impacted with those interrupt, EFPU Floating-point Data Exception, EFPU Floating-point Round, Exception, Data Storage, Instruction Storage, , Alignment, Program, System Call.

Just confirm again, in this case, we can ignore VLE information for instruction skip algorithm checking, right? because MCSRR interrupt don't change VLE anymore.

[davidtosenovjan · Accepted solution]

I guess we haven't understand each other.

You don't need to test whether it is VLE or BookE because e200z4204n3 or e200z210, used with MPC5746C, does not use BookE instruction set.

With MPC57xx, it is only present with MPC5777C/MPC5775B/E using e200z6 core backward compatible with MPC55xx/MPC56xx.

It means it is always VLE instruction, you just need to decide whether 2 or 4 bytes.

[michael_chien1]

Got it. Thanks for your support!