when assert reset ,the chip can't entry debug mode by setting the OCR[DR],OCR[WKUP]
Hi yj L,
have you found a solution for the problem?
I'm also having trouble to get the 5775K into debug mode and read/write with Nexus after entering debug mode.
Regards
whoam
Hi,
When reset is assert micro cannot enter debug mode.
Peter
Are you creating you own JTAG debug tool?
Did you follow AN4365?
https://cache.nxp.com/docs/en/application-note/AN4365.pdf?fsrch=1&sr=1&pageNum=1
yes
When reset is assert ,micro need waite for a long time and shift-ir "211"(bypass) before Set the OCR[DR] and OCR[WKUP] bits.
after entering debug mode，read-write sram will go wrong
