What restrictions are there for the linker file for the SPC5604b

[westinsykes]

I am working on a bootloader for the SPC5604b and I need it to fit within the same memory space as the previous bootloader for compatibility reasons, although the new one takes up much more space. While finding places I could slim it down, I noticed that the map file showed that very little of the init and exception_handlers memory segments were used. What I would like to do is shrink them down to just above what the map file shows they use, but I'm nervous that this may have unintended side effects. What restrictions do I have surrounding those? I noticed the example linker file has a comment in the exception_handlers segment saying the interrupt branch table must be of size 0x800, but the map file doesn't show that much of this is used. What is the reasoning for this comment?

[lukaszadrapa · Accepted solution]

Hi,

there are two important things: the base address of exception handlers (IVPR register) must be aligned to 0x1000 (4KB) and base address of interrupt vector table (VTBA in INTC_IACKR register) must be aligned to 0x800 (2KB) when VTES==0.

So, it's not about size, it's about alignment.

I can't see other restrictions.

Regards,

Lukas

[westinsykes]

Does anyone know anything about this?