SW Reset

[kulk_vikram]

We are using bolero MPC5646C and a SW destructive reset  is observed at wake up from deep sleep.

i.e bits F_SOFT_DEST & F_EXR  of the registers RGM_FES/RGM_DES are SET, while a wake up is requested from deep sleep.

what could be the possible cause of the above mentioned behaviour?

[lukaszadrapa]

Hi,

you can find working SW example here:

https://community.nxp.com/docs/DOC-101614 

I hope it will help you.

Regards,

Lukas

[kulk_vikram]

Hello ,

Thanks for the reply!

i saw your sample code for wake up handling.

but can you please elaborate and suggest the possible causes for the SW destructive reset bit 

 F_SOFT_DEST to SET  which in turn causes external reset?

[lukaszadrapa]

Hi,

I can't really say. Do you trigger destructive software reset somewhere in your application? It's TARGET_MODE '1111' in ME_MCTL register. It's probably caused by complete runaway. So, as the first thing, I would check MMU configuration. This is comment from the example:

* The macro WKP_CORE is used to select which core is used after MCU wakes up.
* When z4 core is selected, it is also necessary to set the MMU otherwise exception
* is generated when uncovered memory area is accessed.
* This is not needed for z0 core due to lack of the MMU.

When waking to RAM, there's only one TLB entry in MMU configured to cover 4KB aligned block around the vector. It is quite common mistake, so I would start with this. See the example for details.

Regards,

Lukas