STAC Interface

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STAC Interface

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ahmedabdelhalee
Contributor II

Hello,

 

Where can I find more details about STAC "Shared Time and Counter" bus interface of eTPU module of MPC5746R?

 

I can see few details in section 43.14.6.3 of the reference manual Rev 6.

 

Thanks,

Ahmed

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

The only info about the STAC bus is given in the RM.

The STAC bus allows an eTPU to export its timebase (TCR1/TCR2) to another eTPU as well as to other peripherals such as the eMIOS.

As you mentioned the STAC is described in the chapter 43.14.6.3. See also chapter 43.7.4 and 43.7.8; the eTPUx REDCR ((eTPU_TBR_STAC_ENGx registers) have to be properly set to configure the eTPU STAC bus operation as a STAC Server/Client module. The Server ID assignment is showed in chapter 43.1.7 STAC bus.

If the STAC-bus Export/Import feature is used, the clock ratio of eTPU : eMIOS should be 1:1 or 2:1

Chapter 42.6.3 STAC Bus Client submodule describes STAC bus usage within an eMIOS module. As there are 2 engines (2 eTPU modules) you have 4 fixed time slots.

BR, Petr