Register protection mechnism

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Register protection mechnism

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abdelrhman
Contributor III

For MPC5744p, I noticed that the register protection mechanism is not provided to all the modules

what are the modules provided by register protection mechanism?

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davidtosenovjan
NXP TechSupport
NXP TechSupport

Hi, you may find it in the RM, Appendix A

davidtosenovjan_0-1654262116768.png

 

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egeonurg
Contributor III

Register protection
The System Integration Unit Lite2 uses the Register Protection Scheme to protect the
individual registers from accidental writes. The following registers can be protected:
• SIUL2 DMA/Interrupt Request Enable Register 0 (SIUL2_DIRER0)
• SIUL2 DMA/Interrupt Request Select Register 0 (SIUL2_DIRSR0)
• SIUL2 Interrupt Rising-Edge Event Enable Register 0 (SIUL2_IREER0)
• SIUL2 Interrupt Falling-Edge Event Enable Register 0 (SIUL2_IFEER0)
• SIUL2 Interrupt Filter Enable Register 0 (SIUL2_IFER0)
• SIUL2 Interrupt Filter Maximum Counter Register (SIUL2_IFMCR0 to
SIUL2_IFMCR31)
• SIUL2 Interrupt Filter Clock Prescaler Register (SIUL2_IFCPR)
• SIUL2 Multiplexed Single Configuration Register (SIUL2_MSCR0 to
SIUL2_MSCR511 and SIUL2_IMCR0 to SIUL2_IMCR511): Only the specific
MSCRs and IMCRs that are actually implemented on a device are protected.
A compiled list identifies the protected registers at specific addresses for this device.

MPC5744P Reference Manual, Rev. 6, 06/2016 - 16.1.3 Register protection 

 

Regards 

Ege

 

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