R_PPC_VLE_SDA21 relocation is in the wrong output section

[Othmane1]

Hi,

I was trying to use the MPC5777C_SingleElf_Multicore_PinToggle example using my own makefile in the S32 design studio, but when i was building i got this error that i don't know how to solve:

c:/nxp/s32ds_power_v2.1/s32ds/build_tools/powerpc-eabivle-4_9/bin/../lib/gcc/powerpc-eabivle/4.9.4/../../../../powerpc-eabivle/bin/real-ld.exe: build/../self-test-libraries/src/stl_lvd_hvd.o: the target (faults) of a R_PPC_VLE_SDA21 relocation is in the wrong output section (.Z7_0_bss)
c:/nxp/s32ds_power_v2.1/s32ds/build_tools/powerpc-eabivle-4_9/bin/../lib/gcc/powerpc-eabivle/4.9.4/../../../../powerpc-eabivle/bin/real-ld.exe: build/../self-test-libraries/src/stl_lvd_hvd.o: the target (faults) of a R_PPC_VLE_SDA21 relocation is in the wrong output section (.Z7_0_bss)
c:/nxp/s32ds_power_v2.1/s32ds/build_tools/powerpc-eabivle-4_9/bin/../lib/gcc/powerpc-eabivle/4.9.4/../../../../powerpc-eabivle/bin/real-ld.exe: final link failed: Bad value
collect2.exe: error: ld returned 1 exit status
make: *** [Makefile:113: MPC5777C-516DS_Flash.elf] Error 1

[jiri_kral]

Hi, 

you may find helpful this thread - https://community.nxp.com/t5/S32-SDK/Initilization-error-for-Z7a-core/m-p/1322720  

Try to remove one or both flags. 

[Othmane1]

Now i can build but i have another problem which is that i only can flash the core 0, for core 1 when i try to flash nothing happen, like this

i want to understand how exactly the core 1 is suppose to be waken up, because as far as i understand the key palyers are the linker files (for both core0 and core1) which i haven't change from what it is in the example project, then system_MPC5777C.c file which has this code below that seems to initialize the core 1: 

void SystemInit(void)

{

//#if defined(START_SECONDARY_CORES)

//#if defined(TURN_ON_CPU1)

    uint32_t cpu1_bootAddr = 0U;

    #if defined(__cpu1_boot_addr__)

        cpu1_bootAddr = __cpu1_boot_addr__;

    #else

        //#if defined(START_FROM_FLASH)

            cpu1_bootAddr = 0x00C00000U;

        //#else

            //cpu1_bootAddr = 0x40040000U;

        //#endif /* defined(START_FROM_FLASH) */

    #endif /* defined(__cpu1_boot_addr__) */

    /* Set Start address for core 1: Will reset and start */

    SIU->RSTVEC1 = cpu1_bootAddr | 0x1U;

//#endif /* defined(TURN_ON_CPU1) */

//#endif /* defined(START_SECONDARY_CORES) */

and the build configuration which i have it like this: 

is there something else that i need to take care of apart from the things that i mentioned?

[jiri_kral]

Hi, 

you need to add the .elf file for core_1 into boot core_0 as an additional .elf file: 

Or use launch group: 

[Othmane1]

When i try to do that i get that (include elf file of core1 as additional to core 0) error:

I also tried with the other option but it give me the same behaviour as i was receiving when i do them seperatly 

[Othmane1]

i include the warning in the console when i try to do your second option (same when i flash each project alone):

MPC5777C Device detected.
PE-ERROR: Warning. Can't read memory while part is running. @c00000 (4 bytes)
PE-ERROR: Warning. Can't read memory while part is running. @c12268 (4 bytes)
PE-ERROR: Warning. Can't read memory while part is running. @c12268 (4 bytes)
PE-ERROR: Warning. Can't read memory while part is running. @c12268 (4 bytes)
PE-ERROR: Warning. Can't read registers while part is running.

I also got this when i was trying the first option:

Loading programming algorithm ...
Done.
Programming sequency is : erase, blank check, program, and verify {default}
CMD>VC
Verifying object file CRC-16 to device ranges ...
block 00800000-00800007 ...
Ok.
block 00800000-00800007 ...
Calculated CRC-16 does not match block. (File = $CF70, Device = $83B4)
Current content of flash does not match application to be programmed

CMD>EM

Erasing.
Module has been erased.
CMD>PM

Programming.
Processing Object File Data ...

Error during programming.
Error Programming flash of device
Error occured during Flash programming.

Device IDCODE is $00000377
Device ID revision is $00000001

Starting reset script (C:\NXP\S32DS_Power_v2.1\eclipse\plugins\com.pemicro.debug.gdbjtag.ppc_1.8.7.201906071634\win32\gdi\P&E\s32e200_mpc5777c.mac) ...
REM This script is compatible with MPC5777C devices.
REM Clean GPRs to remove residual data after using algorithm
REM Setup MMU for for Periph B Modules
REM Base address = $FFE0_0000
REM TLB0, 2 MByte Memory Space, Guarded, Don't Cache, All Access
Once Status Register Result = $0209
REM Set up MMU to put internal Flash at 0...
REM Virtual address 0x0 -> Physical address = $0000_0000
REM TLB1, 16 MByte Memory Space, Not Guarded, Cachable, All Access
Once Status Register Result = $0209
REM Set up MMU for External Memory
REM Base address = $2000_0000
REM TLB2, 16 MByte Memory Space, Not Guarded, Cachable, All Access
Once Status Register Result = $0209
REM Set up MMU for Internal SRAM
REM Base address = $4000_0000
REM TLB3, 512 KByte Memory Space, Not Guarded, Don't Cache, All Access
Once Status Register Result = $0209
REM Set up MMU for Periph A Modules
REM Base address = $C3E0_0000
REM TLB4, 2 MByte Memory Space, Guarded, Don't Cache, All Access
Once Status Register Result = $0209
REM Initialize all of the Main SRAM - 512KB
Initializing RAM from $40000000 to $4007FFFF.

Reset script (C:\NXP\S32DS_Power_v2.1\eclipse\plugins\com.pemicro.debug.gdbjtag.ppc_1.8.7.201906071634\win32\gdi\P&E\s32e200_mpc5777c.mac) completed.

MPC5777C Device detected.

[jiri_kral]

Hi,

äre both .elf files using different flash memory space? Please check the linker script file for both core projects. 

[Othmane1]

I already check them, you can find them attached

[Othmane1]

i also noticed that i need to add the elf file of core1 into the makefile of core0 but still not working

[jiri_kral]

It is possible share both .elf files? 

[Othmane1]

you can find them attached

[Othmane1]

I also tried to include the elf file of core1 in the make file of core 0 which I guess it can solve the problem, but it was generating a lot of multiple definition errors while compiling since both cores they share the same startup code, but in the example project there is nor error even though in there also both core shares the same startup code, there must be something in the makefile they did to solve that!!

I attached below my makefile for core0:

[jiri_kral]

Hi, 

I did some tests and if I'm trying flash both .elf files - the one for second core always ruins the debug session. If I flash the elf file to boot core (doesn't matter if it is .elf for core_0 or core_1), debug session can be started and the program ends in some loop. 

I generated s-records for both files and the memory usage looks okay, there is no overlap. I also tested another multi-core project and there is no issue to flash both elfs files by the procedures described above.  

So, definitely some interaction between the two .elf files broke debug session. Have no idea what it can be - is there some shared memory between cores and is there properly applied critical section? 

If it is possible share the project (you can use my email if you don't like to share it on community) - I'll look at it. 

[Othmane1]

i have created an example project in which i face the same issues because i can not share the original 

[jiri_kral]

Hi,

the project can't correctly used with S32DS - there is no toolchain defined and the structure is strange. Are you using gcc as a compiler? 

Looks that the elf is not for some reason compatible with the GNU GCC toolchain v4.9 for PowerPC. I suggest to create new empty project for MPC5777C and move your source code to the new project. 

[Othmane1]

Hi,

you should import those two projects as project with existing makefile in the S32 design studio and use the standard S32 toolchain

[Othmane1]

let me know if it works for you

[jiri_kral]

Yes, I can build it, but the same result. It ruins debug session if code for second core is added. The project structure is very unusual (I understand that it is makefile project). 

I went briefly through code and for example I didn't find code for bringing up second core - which may be reason why the debug session crashes. Also code from board folder is not built. 

[Othmane1]

what do you mean by starting up the second core, because what i did is i define the flags for staring the second core in the make file of core 1, this way the startup code calls the  SystemInit function the core1 will be started.

Please let me know if i'm missing something and the process

[jiri_kral]

quick update - the __cpu1_boot_addr__  is not defined as well (it probably should came from linker script file). 

[jiri_kral]

I went trough startup - and there is probably no defined START_FROM_FLASH macro: 

The second core boots from RAM. Tested with Z7_0/MPC5777C-516DS_Z70_Flash.elf file.