Hi, I am trying to use performance monitoring feature of e200z759n3 as described in "e200z759n3 Core Reference Manual". The purpose is to evaluate CPU utilization and generate "Performance monitor interrupt (IVOR35)", as described in section 7.7.21 of the manual, when the CPU utilization equals or exceeds 100%. To achieve this condition, I am depending on the OV bit(overflow bit) in PMC0-3 registers.
I am planning to provide values 97, 98, 99, 100 in the EVENT field registers PMLCa0, 1, 2, 3 to enable them gererate IVOR35 interrupt.
Com:97 PMC0 rollover N/A — PMC0OV transitions from 1 to 0.
Com:98 PMC1 rollover N/A — PMC1OV transitions from 1 to 0.
Com:99 PMC2 rollover N/A — PMC2OV transitions from 1 to 0.
Com:100 PMC3 rollover N/A — PMC3OV transitioned from 1 to 0.
Is this a correct approach?
Also any application note specific to "Performance Monitoring" containing the use cases for its implementation will be very helpful.
Thanks.
