Memory error injection Test in eTPU

[arjunrath]

Hi ,

I am working on SDM and SCM memory error injection and correction test for eTPU . This is for MPC5676RRM . I am trying to understand the usage of "eTPU Data Error Injection Address Register " . This register descriptions says to use a 12 bit address but the memory map for SDM shows as 0x8000-0xBFFF which are 16 bit addresses . So not sure how to configure this register to inject fault in SDM .

Also which register I should use for doing a memory pattern test for eTPU ?

Is there a sample code I can refer to for the two above ?

Regards

Arjun

[davidtosenovjan]

Hi,

0x8000-0xBFFF is address offset only.

Address ranges from CPU side are

eTPU_AB 0xC3FC8000 - 0xC3FC97FF

eTPU_C 0xC3E28000 - 0xC3E28BFF

The two least significant bits are 0 (read-only), so that the address is always 32-bit aligned.

Currently I don’t have example code for this. However, it seems quite straightforward, similar way as common ECC RAM by ECSM module as described in AN5200, section 6.1

See RM screenshot below: