MPC5xxx external interrupt priority

[Varshap]

MPC5777 MCU supports 16 external interrupts. to detect edge events (rising or falling edge )individual SIU_DIRER register bits needs to be set.

Once edge event is detected corresponding bits in the register SIU_EISR is set.

Priority for these IRQs we can set with SIU_EIISR[EIF0] , SIU_EIISR[EIF1], SIU_EIISR[EIF2], SIU_EIISR[EIF3] and SIU_EIISR[EIF15:EIF4].

Priority for IRQ0 to IRQ3 we can set individually. For IRQ signal 4 to 15 we need to set single priority level.

My question is how priority is taken care for IRQ 4- 15 signals when simultaneous interrupts is registered.

Wanted to know how MCU will behave when simultaneous IRQ interrupts occurred. Which signal will get priority

[petervlna]

Hello,

There is only one interrupt vector for these sources (4-15).

There is no prioritizing in case multiple simultaneous IRQ interrupts occurs, user just will see multiple flags set and it is up to the user software how it will be prioritized.

best regards,

Peter

[Varshap]

Thanks Peter

One more question I have regarding external interrupt module.
How MCU will behave in case 2 simultaneous IRQ occurred.  i.e. interrupt got hit for IRQ7 and IRQ5 both.

flag will get set for both IRQs. But what I am observing if I go for ISR of IRQ7 , IRQ5 flag is getting reset as well.