MPC5777c DSPI SOUT configuration

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 
已解决

MPC5777c DSPI SOUT configuration

跳至解决方案
6,852 次查看
sudheer_adavala
Contributor II

Hi,

When we configure MPC5777C DSPI in 8-bit/16-bit mode, SOUT is pulsing exactly at 8th clock/16th clock pulse. Attached DSO screen yellow is SOUT (Highlighted with red circle), written data from MPC5777C is 0xA0 00 50 00 55, also attached DSPI configuration. Suggest how to solve this.

Thanks & Regards,

Sudheer A.

0 项奖励
回复
1 解答
6,799 次查看
davidtosenovjan
NXP TechSupport
NXP TechSupport

Such configuration is not possible. There is always certain minimum time between tASC/tCSC (as stated in the device datasheet), excluding mode with Continuous SCK.

You said "SLAVE doesn't require Continuous SCK" what does not imply such configuration cannot work. There is also CS signal that is being asserted only during transfer.

davidtosenovjan_0-1619611147671.pngdavidtosenovjan_1-1619611167101.png

davidtosenovjan_2-1619611213840.png

 

 

在原帖中查看解决方案

0 项奖励
回复
7 回复数
6,851 次查看
davidtosenovjan
NXP TechSupport
NXP TechSupport

Hi, could you describe all colors in the scope measurement?

0 项奖励
回复
6,844 次查看
sudheer_adavala
Contributor II

Hi,

Yellow - SOUTA 

Blue    - SCLKA (400Khz)

Green - SINA from Slave device

Pink    - Ignore this (One of the signal from Slave device)

PCSA0 - Low (Not captured in Scope)

 

Regards,

Sudheer A

 

0 项奖励
回复
6,833 次查看
sudheer_adavala
Contributor II

Hi,

Any suggestions.?

 

 

 

0 项奖励
回复
6,823 次查看
davidtosenovjan
NXP TechSupport
NXP TechSupport

I think it is configuration like this:

davidtosenovjan_0-1619605542959.png

Isn't it?

Can you zoom SCK signal below marked delays.

Actually what is the meaning of the question? Do you see some behavior contrary to the documentation description?

 

6,812 次查看
sudheer_adavala
Contributor II

Hi,

As shown  "Figure 42-62. Continuous SCK timing diagram (CONT=1)"    in RM, our requirement also  same, except continuous SCK (SLAVE doesn't require Continuous SCK). SCK should be there only during transfers. Suggest us the possible configuration.

0 项奖励
回复
6,800 次查看
davidtosenovjan
NXP TechSupport
NXP TechSupport

Such configuration is not possible. There is always certain minimum time between tASC/tCSC (as stated in the device datasheet), excluding mode with Continuous SCK.

You said "SLAVE doesn't require Continuous SCK" what does not imply such configuration cannot work. There is also CS signal that is being asserted only during transfer.

davidtosenovjan_0-1619611147671.pngdavidtosenovjan_1-1619611167101.png

davidtosenovjan_2-1619611213840.png

 

 

0 项奖励
回复
6,799 次查看
sudheer_adavala
Contributor II

Here i have attached SLAVE communication which am trying to interface in same way from MPC5777C. DSO signals followed by CS, CLOCK, MOSI,MISO of proven SLAVE EVAL board communication. MOSI inactive state is low/high is acceptable.

Same couldn't  match MPC5777C to SLAVE, because of tCSC and tASC . 

 

 

 

 

 

0 项奖励
回复