MPC5748G MII-LITE Dual Ethernet Communication (ENET0 ENET1 working simultaneously)

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MPC5748G MII-LITE Dual Ethernet Communication (ENET0 ENET1 working simultaneously)

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liuweiliang
Contributor II

Problem description : PHY0 chip corresponding to the ENET0 resource is transmitting normally and the receiver can enter the interrupt but the received data is incorrect.The transmission and reception of the PHY1 chip corresponding to the ENET1 resource is abnormal. Code Reference AN4830 Qorivva Recipes for MPC574xG Code Sample Code for Ethernet Folder。

Hardware:

1.png

The MII-Lite interface is defined as follows;

 

MPC5748G

PHY0

MPC5748G

PHY1

No.

MODULE

pin

pin

MODULE

pin

pin

1

ENET0

PG13

TXD3

ENET1

PI13

TXD3

2

PG12

TXD2

PH3

TXD2

3

PH0

TXD1

PA10

TXD1

4

PH1

TXD0

PA11

TXD0

5

PH2

TXEN

PI12

TXEN

6

PG1

TXCLK

PE12

TXCLK

7

PE13

RXD3

PB6

RXD3

8

PA7

RXD2

PB7

RXD2

9

PA8

RXD1

PD9

RXD1

10

PA9

RXD0

PD10

RXD0

11

PF15

RXDV

PB5

RXDV

12

PA3

RXCLK

PB11

RXCLK

13

PG0

MDC

PG0

MDC

14

PF14

MDIO

PF14

MDIO

CODE:

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1,142件の閲覧回数
d_bi
Contributor I

你好,请问问题解决了吗?我现在跟你遇到了同样的问题,能否跟你交流学习下?

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