[MPC5746R] Inconsistent information between DSPI and IO Port in Reference Manual

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[MPC5746R] Inconsistent information between DSPI and IO Port in Reference Manual

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NXP Employee
NXP Employee

Hello,

I have a concern in Reference Manual from customers, which is a mismatch between supported DSPI CS pins and corresponding CS IO Port pins.

DSPI.jpg

DSPI2 can support PCS0-3, however there is an available CS4 pins for DSPI2 in IO Signal description. With DSPI1, it can support PCS0-4, however there is no CS4 for DSPI1, so I supposed there might be a typo here between DSPI1 and DSPI2.

Does anyone have experience about this situation? 

Nam

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3 Replies

NXP TechSupport
NXP TechSupport

Hi Nam,

here is the feedback:

After confirmed with design the RM Table 48-1will be updated as below.

 

DSPI_1 only supports Chip Select 0 to 3.  ( DSPI_1 PCS4 not supported)

DSPI_2 supports Chip Selects of 0 to 4. (DSPI_2 supports PCS4 )

 

IO signal excel contains the correct information.

Regards,

Lukas

NXP Employee
NXP Employee

Thanks Lukas! It's really helpful

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NXP TechSupport
NXP TechSupport

Hi,

thanks for pointing this out, I created a ticket for responsible team. Let's wait for their feedback.

Regards,

Lukas

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