MPC5746R DSPI problem

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MPC5746R DSPI problem

692件の閲覧回数
flyskyr丶
Contributor III

  I using DSPI0 ad master, but it can't work. Then testing the sclk pin , there is no single . 

Can you help me to see what the problem is?

MPC57XX motherboard + MPC5746R-176DC

code:

void DSPI0_Init_Master(void)
{
DSPI_0.MCR.R = 0xC0080001;
DSPI_0.MODE.CTAR[3].R = 0x78021003; //baud rate is 1M

//sout pk2 ps2
SIUL2.MSCR0_255[187].B.ODC = 2;
SIUL2.MSCR0_255[187].B.OERC = 3;
SIUL2.MSCR0_255[187].B.SSS = 0x0D;
//sin pk1 ps1
SIUL2.MSCR0_255[186].B.IBE = 1;
// SIUL2.MSCR0_255[186].B.SSS = 5;
//SIUL2.MSCR0_255[186].B.ILS = 1;
//SIUL2.MSCR512_995[809-512].B.SSS = 0x02;
//sclk pj14 pj14
SIUL2.MSCR0_255[158].B.ODC = 2;
SIUL2.MSCR0_255[158].B.OERC = 3;
// SIUL2.MSCR0_255[158].B.SSS = 0x0E;
//cs3 ptk0 ps0
SIUL2.MSCR0_255[185].B.ODC = 2;
SIUL2.MSCR0_255[185].B.OERC = 3;
SIUL2.MSCR0_255[185].B.WPUE = 1;
SIUL2.MSCR0_255[185].B.SSS = 0x0D;


DSPI_0.MCR.B.HALT = 0x0;
}

main:

DSPI0_Init_Master();

while(1)
{
counter ++;
DSPI_0.PUSHR.PUSHR.R = 0xB8085678;
while (DSPI_0.SR.B.TCF != 1){}
DSPI_0.SR.R = 0xFCFE0000;
//while(counter --);
}

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469件の閲覧回数
jamesmurray
Contributor V

In my working SPI code, I do:

    DSPI_3.MCR.B.MDIS = 1; /* Disable to allow configuration */

.... all configuration in here ...

    DSPI_3.MCR.B.MDIS = 0; /* Enable */
    DSPI_3.SR.R = 0xffffffff; /* Clear all status flags */

I haven't checked all of the register values you are using. I'm using non-continuous mode.

James

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jyothsnarajan
Contributor V

Hi James, 

I have a similar question about configuring the DSPI interface on MPC5746R.  DSPI0 module is configured as master and is connected to two slave devices, connected via CS0 and CS1.

Slave selected using CS0 is an NXP SBC chip, requires 16-bit frames.

Slave selected using CS1 is an external device that accepts 32-bit SPI frames. 

Is it possible to configure  single DSPI module to send frames of different sizes to different slaves?

MPC5746RRM Rev6, pg. 1968 states "When extended SPI mode is disabled, since both TXFIFO and CMD FIFO are written to and read from simultaneously, it can be thought of as a single 32-bit FIFO".  On reading this I felt it should be possible to send 32-bit frames - all i should do is write the 32-bit word(say 0xDEADBEEF) to the PUSH-TX FIFO as below:

DSPI_0.PUSHR.PUSHR.R = 0xDEADBEEF;

But if the data in the COMMAND FIFO is being being interpreted as any 16-bit data, where do I specify which ChipSelect( and thus which slave) I want this message sent to?

I checked a couple of SPI examples for other processors - in all of them, extended mode is disabled , yet the data in the COMMAND FIFO is interpreted as a command and not as data. 

Can you please clarify? Also an example on using extended SPI mode would be very helpful.

Thank you,

Jyothsna

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